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Mon, 22 Sep 2025 22:31:04 -0700 (PDT) Received: from localhost ([196.207.164.177]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-3ee0fbfedd6sm22741022f8f.60.2025.09.22.22.31.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Sep 2025 22:31:04 -0700 (PDT) Date: Tue, 23 Sep 2025 08:31:00 +0300 From: Dan Carpenter To: oe-kbuild@lists.linux.dev, Marius Cristea , Jonathan Cameron , David Lechner , Nuno =?iso-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: lkp@intel.com, oe-kbuild-all@lists.linux.dev, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marius Cristea Subject: Re: [PATCH 2/2] iio: temperature: add support for EMC1812 Message-ID: <202509231015.K3B5TN1Q-lkp@intel.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250917-iio-emc1812-v1-2-0b1f74cea7ab@microchip.com> Hi Marius, kernel test robot noticed the following build warnings: url: https://github.com/intel-lab-lkp/linux/commits/Marius-Cristea/dt-bindings-iio-temperature-add-support-for-EMC1812/20250917-202833 base: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 patch link: https://lore.kernel.org/r/20250917-iio-emc1812-v1-2-0b1f74cea7ab%40microchip.com patch subject: [PATCH 2/2] iio: temperature: add support for EMC1812 config: powerpc64-randconfig-r071-20250922 (https://download.01.org/0day-ci/archive/20250923/202509231015.K3B5TN1Q-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project cafc064fc7a96b3979a023ddae1da2b499d6c954) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Reported-by: Dan Carpenter | Closes: https://lore.kernel.org/r/202509231015.K3B5TN1Q-lkp@intel.com/ smatch warnings: drivers/iio/temperature/emc1812.c:645 emc1812_parse_fw_config() warn: passing zero to 'dev_err_probe' vim +/dev_err_probe +645 drivers/iio/temperature/emc1812.c 56c661fffa897b2 Marius Cristea 2025-09-17 611 static int emc1812_parse_fw_config(struct emc1812_priv *priv, struct device *dev, 56c661fffa897b2 Marius Cristea 2025-09-17 612 int device_nr_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 613 { 56c661fffa897b2 Marius Cristea 2025-09-17 614 unsigned int reg_nr, iio_idx, tmp; 56c661fffa897b2 Marius Cristea 2025-09-17 615 int ret; 56c661fffa897b2 Marius Cristea 2025-09-17 616 56c661fffa897b2 Marius Cristea 2025-09-17 617 priv->apdd_en = device_property_read_bool(dev, "microchip,enable-anti-parallel"); 56c661fffa897b2 Marius Cristea 2025-09-17 618 priv->recd12_en = device_property_read_bool(dev, "microchip,parasitic-res-on-channel1-2"); 56c661fffa897b2 Marius Cristea 2025-09-17 619 priv->recd34_en = device_property_read_bool(dev, "microchip,parasitic-res-on-channel3-4"); 56c661fffa897b2 Marius Cristea 2025-09-17 620 56c661fffa897b2 Marius Cristea 2025-09-17 621 memset32(priv->beta_values, 16, ARRAY_SIZE(priv->beta_values)); 56c661fffa897b2 Marius Cristea 2025-09-17 622 device_property_read_u32(dev, "microchip,beta1", &priv->beta_values[0]); 56c661fffa897b2 Marius Cristea 2025-09-17 623 device_property_read_u32(dev, "microchip,beta2", &priv->beta_values[1]); 56c661fffa897b2 Marius Cristea 2025-09-17 624 if (priv->beta_values[0] > 16 || priv->beta_values[1] > 16) 56c661fffa897b2 Marius Cristea 2025-09-17 625 return dev_err_probe(dev, -EINVAL, "Invalid beta value\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 626 56c661fffa897b2 Marius Cristea 2025-09-17 627 priv->num_channels = device_get_child_node_count(dev) + 1; 56c661fffa897b2 Marius Cristea 2025-09-17 628 56c661fffa897b2 Marius Cristea 2025-09-17 629 if (priv->num_channels > priv->chip->phys_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 630 return dev_err_probe(dev, -E2BIG, "More channels than the chip supports\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 631 56c661fffa897b2 Marius Cristea 2025-09-17 632 priv->iio_chan[0] = EMC1812_CHAN(0, 0, EMC1812_CH_ADDR(0)); 56c661fffa897b2 Marius Cristea 2025-09-17 633 56c661fffa897b2 Marius Cristea 2025-09-17 634 priv->labels[0] = "internal_diode"; 56c661fffa897b2 Marius Cristea 2025-09-17 635 iio_idx = 1; 56c661fffa897b2 Marius Cristea 2025-09-17 636 device_for_each_child_node_scoped(dev, child) { 56c661fffa897b2 Marius Cristea 2025-09-17 637 ret = fwnode_property_read_u32(child, "reg", ®_nr); 56c661fffa897b2 Marius Cristea 2025-09-17 638 if (ret || reg_nr >= priv->chip->phys_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 639 return dev_err_probe(dev, -EINVAL, 56c661fffa897b2 Marius Cristea 2025-09-17 640 "The index of the channels does not match the chip\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 641 56c661fffa897b2 Marius Cristea 2025-09-17 642 ret = fwnode_property_read_u32(child, "microchip,ideality-factor", &tmp); 56c661fffa897b2 Marius Cristea 2025-09-17 643 if (ret == 0) { 56c661fffa897b2 Marius Cristea 2025-09-17 644 if (tmp < 8 || tmp > 63) 56c661fffa897b2 Marius Cristea 2025-09-17 @645 return dev_err_probe(dev, ret, "Invalid ideality value\n"); Change ret to -EINVAL. 56c661fffa897b2 Marius Cristea 2025-09-17 646 priv->ideality_value[reg_nr - 1] = tmp; 56c661fffa897b2 Marius Cristea 2025-09-17 647 } else { 56c661fffa897b2 Marius Cristea 2025-09-17 648 priv->ideality_value[reg_nr - 1] = 18; 56c661fffa897b2 Marius Cristea 2025-09-17 649 } 56c661fffa897b2 Marius Cristea 2025-09-17 650 56c661fffa897b2 Marius Cristea 2025-09-17 651 fwnode_property_read_string(child, "label", &priv->labels[reg_nr]); 56c661fffa897b2 Marius Cristea 2025-09-17 652 56c661fffa897b2 Marius Cristea 2025-09-17 653 priv->iio_chan[iio_idx++] = EMC1812_CHAN(reg_nr, reg_nr, EMC1812_CH_ADDR(reg_nr)); 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d="scan'208";a="177427262" Received: from lkp-server02.sh.intel.com (HELO 84c55410ccf6) ([10.239.97.151]) by fmviesa010.fm.intel.com with ESMTP; 22 Sep 2025 19:42:44 -0700 Received: from kbuild by 84c55410ccf6 with local (Exim 4.96) (envelope-from ) id 1v0szK-0002gf-0G; Tue, 23 Sep 2025 02:42:42 +0000 Date: Tue, 23 Sep 2025 10:42:19 +0800 From: kernel test robot To: oe-kbuild@lists.linux.dev Cc: lkp@intel.com, Dan Carpenter Subject: Re: [PATCH 2/2] iio: temperature: add support for EMC1812 Message-ID: <202509231015.K3B5TN1Q-lkp@intel.com> Precedence: bulk X-Mailing-List: oe-kbuild@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit BCC: lkp@intel.com CC: oe-kbuild-all@lists.linux.dev In-Reply-To: <20250917-iio-emc1812-v1-2-0b1f74cea7ab@microchip.com> References: <20250917-iio-emc1812-v1-2-0b1f74cea7ab@microchip.com> TO: Marius Cristea TO: Jonathan Cameron TO: David Lechner TO: "Nuno Sá" TO: Andy Shevchenko TO: Rob Herring TO: Krzysztof Kozlowski TO: Conor Dooley CC: linux-iio@vger.kernel.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: Marius Cristea Hi Marius, kernel test robot noticed the following build warnings: [auto build test WARNING on 19272b37aa4f83ca52bdf9c16d5d81bdd1354494] url: https://github.com/intel-lab-lkp/linux/commits/Marius-Cristea/dt-bindings-iio-temperature-add-support-for-EMC1812/20250917-202833 base: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 patch link: https://lore.kernel.org/r/20250917-iio-emc1812-v1-2-0b1f74cea7ab%40microchip.com patch subject: [PATCH 2/2] iio: temperature: add support for EMC1812 :::::: branch date: 6 days ago :::::: commit date: 6 days ago config: powerpc64-randconfig-r071-20250922 (https://download.01.org/0day-ci/archive/20250923/202509231015.K3B5TN1Q-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project cafc064fc7a96b3979a023ddae1da2b499d6c954) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Reported-by: Dan Carpenter | Closes: https://lore.kernel.org/r/202509231015.K3B5TN1Q-lkp@intel.com/ smatch warnings: drivers/iio/temperature/emc1812.c:645 emc1812_parse_fw_config() warn: passing zero to 'dev_err_probe' vim +/dev_err_probe +645 drivers/iio/temperature/emc1812.c 56c661fffa897b2 Marius Cristea 2025-09-17 610 56c661fffa897b2 Marius Cristea 2025-09-17 611 static int emc1812_parse_fw_config(struct emc1812_priv *priv, struct device *dev, 56c661fffa897b2 Marius Cristea 2025-09-17 612 int device_nr_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 613 { 56c661fffa897b2 Marius Cristea 2025-09-17 614 unsigned int reg_nr, iio_idx, tmp; 56c661fffa897b2 Marius Cristea 2025-09-17 615 int ret; 56c661fffa897b2 Marius Cristea 2025-09-17 616 56c661fffa897b2 Marius Cristea 2025-09-17 617 priv->apdd_en = device_property_read_bool(dev, "microchip,enable-anti-parallel"); 56c661fffa897b2 Marius Cristea 2025-09-17 618 priv->recd12_en = device_property_read_bool(dev, "microchip,parasitic-res-on-channel1-2"); 56c661fffa897b2 Marius Cristea 2025-09-17 619 priv->recd34_en = device_property_read_bool(dev, "microchip,parasitic-res-on-channel3-4"); 56c661fffa897b2 Marius Cristea 2025-09-17 620 56c661fffa897b2 Marius Cristea 2025-09-17 621 memset32(priv->beta_values, 16, ARRAY_SIZE(priv->beta_values)); 56c661fffa897b2 Marius Cristea 2025-09-17 622 device_property_read_u32(dev, "microchip,beta1", &priv->beta_values[0]); 56c661fffa897b2 Marius Cristea 2025-09-17 623 device_property_read_u32(dev, "microchip,beta2", &priv->beta_values[1]); 56c661fffa897b2 Marius Cristea 2025-09-17 624 if (priv->beta_values[0] > 16 || priv->beta_values[1] > 16) 56c661fffa897b2 Marius Cristea 2025-09-17 625 return dev_err_probe(dev, -EINVAL, "Invalid beta value\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 626 56c661fffa897b2 Marius Cristea 2025-09-17 627 priv->num_channels = device_get_child_node_count(dev) + 1; 56c661fffa897b2 Marius Cristea 2025-09-17 628 56c661fffa897b2 Marius Cristea 2025-09-17 629 if (priv->num_channels > priv->chip->phys_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 630 return dev_err_probe(dev, -E2BIG, "More channels than the chip supports\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 631 56c661fffa897b2 Marius Cristea 2025-09-17 632 priv->iio_chan[0] = EMC1812_CHAN(0, 0, EMC1812_CH_ADDR(0)); 56c661fffa897b2 Marius Cristea 2025-09-17 633 56c661fffa897b2 Marius Cristea 2025-09-17 634 priv->labels[0] = "internal_diode"; 56c661fffa897b2 Marius Cristea 2025-09-17 635 iio_idx = 1; 56c661fffa897b2 Marius Cristea 2025-09-17 636 device_for_each_child_node_scoped(dev, child) { 56c661fffa897b2 Marius Cristea 2025-09-17 637 ret = fwnode_property_read_u32(child, "reg", ®_nr); 56c661fffa897b2 Marius Cristea 2025-09-17 638 if (ret || reg_nr >= priv->chip->phys_channels) 56c661fffa897b2 Marius Cristea 2025-09-17 639 return dev_err_probe(dev, -EINVAL, 56c661fffa897b2 Marius Cristea 2025-09-17 640 "The index of the channels does not match the chip\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 641 56c661fffa897b2 Marius Cristea 2025-09-17 642 ret = fwnode_property_read_u32(child, "microchip,ideality-factor", &tmp); 56c661fffa897b2 Marius Cristea 2025-09-17 643 if (ret == 0) { 56c661fffa897b2 Marius Cristea 2025-09-17 644 if (tmp < 8 || tmp > 63) 56c661fffa897b2 Marius Cristea 2025-09-17 @645 return dev_err_probe(dev, ret, "Invalid ideality value\n"); 56c661fffa897b2 Marius Cristea 2025-09-17 646 priv->ideality_value[reg_nr - 1] = tmp; 56c661fffa897b2 Marius Cristea 2025-09-17 647 } else { 56c661fffa897b2 Marius Cristea 2025-09-17 648 priv->ideality_value[reg_nr - 1] = 18; 56c661fffa897b2 Marius Cristea 2025-09-17 649 } 56c661fffa897b2 Marius Cristea 2025-09-17 650 56c661fffa897b2 Marius Cristea 2025-09-17 651 fwnode_property_read_string(child, "label", &priv->labels[reg_nr]); 56c661fffa897b2 Marius Cristea 2025-09-17 652 56c661fffa897b2 Marius Cristea 2025-09-17 653 priv->iio_chan[iio_idx++] = EMC1812_CHAN(reg_nr, reg_nr, EMC1812_CH_ADDR(reg_nr)); 56c661fffa897b2 Marius Cristea 2025-09-17 654 } 56c661fffa897b2 Marius Cristea 2025-09-17 655 56c661fffa897b2 Marius Cristea 2025-09-17 656 return 0; 56c661fffa897b2 Marius Cristea 2025-09-17 657 } 56c661fffa897b2 Marius Cristea 2025-09-17 658 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki