From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 390EBCAC59A for ; Wed, 24 Sep 2025 05:56:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUD-0002O6-Jy; Wed, 24 Sep 2025 01:56:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUC-0002LP-Gc; Wed, 24 Sep 2025 01:56:16 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IU8-0000It-Fg; Wed, 24 Sep 2025 01:56:16 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:03 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:03 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 0/7] Support VBOOTROM to ast2700fc machine Date: Wed, 24 Sep 2025 13:55:54 +0800 Message-ID: <20250924055602.294857-1-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org v1 1. Added support for Vboot ROM. 2. Moved coprocessor initialization from machine level to SoC level 3. Unified SCU controllers between PSP and coprocessors 4. Shared the same SRAM between PSP and coprocessors 5. Support PSP DRAM remaps coprocessor SDRAM 6. Added support for controlling coprocessor reset via SCU registers. v2 Split the original patch set into smaller sub-patches for review. This patch focuses on: 1. Adding support for Vboot ROM 2. Moving common APIs to SoC-level code for reuse in different platforms and reducing duplication. Dependencies Based on https://github.com/legoater/qemu at the aspeed-next branch. Jamin Lin (7): hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code hw/arm/aspeed: Move write_boot_rom to common SoC code hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC code hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC code hw/arm/aspeed_ast27x0-fc: Replace error_abort with local errp hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support include/hw/arm/aspeed_soc.h | 8 +++ hw/arm/aspeed.c | 105 ++---------------------------------- hw/arm/aspeed_ast27x0-fc.c | 46 ++++++++++++---- hw/arm/aspeed_soc_common.c | 96 +++++++++++++++++++++++++++++++++ 4 files changed, 143 insertions(+), 112 deletions(-) -- 2.43.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FF1BCAC59A for ; Wed, 24 Sep 2025 05:58:23 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v1IUH-0002Xa-5l; Wed, 24 Sep 2025 01:56:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IUC-0002LP-Gc; Wed, 24 Sep 2025 01:56:16 -0400 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v1IU8-0000It-Fg; Wed, 24 Sep 2025 01:56:16 -0400 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 24 Sep 2025 13:56:03 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 24 Sep 2025 13:56:03 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: , Subject: [PATCH v2 0/7] Support VBOOTROM to ast2700fc machine Date: Wed, 24 Sep 2025 13:55:54 +0800 Message-ID: <20250924055602.294857-1-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org v1 1. Added support for Vboot ROM. 2. Moved coprocessor initialization from machine level to SoC level 3. Unified SCU controllers between PSP and coprocessors 4. Shared the same SRAM between PSP and coprocessors 5. Support PSP DRAM remaps coprocessor SDRAM 6. Added support for controlling coprocessor reset via SCU registers. v2 Split the original patch set into smaller sub-patches for review. This patch focuses on: 1. Adding support for Vboot ROM 2. Moving common APIs to SoC-level code for reuse in different platforms and reducing duplication. Dependencies Based on https://github.com/legoater/qemu at the aspeed-next branch. Jamin Lin (7): hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code hw/arm/aspeed: Move write_boot_rom to common SoC code hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC code hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC code hw/arm/aspeed_ast27x0-fc: Replace error_abort with local errp hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support include/hw/arm/aspeed_soc.h | 8 +++ hw/arm/aspeed.c | 105 ++---------------------------------- hw/arm/aspeed_ast27x0-fc.c | 46 ++++++++++++---- hw/arm/aspeed_soc_common.c | 96 +++++++++++++++++++++++++++++++++ 4 files changed, 143 insertions(+), 112 deletions(-) -- 2.43.0