From: Nathan Chancellor <nathan@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Gunthorpe <jgg@nvidia.com>,
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Subject: Re: [PATCH net-next V5] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
Date: Thu, 25 Sep 2025 16:30:46 -0400 [thread overview]
Message-ID: <20250925203046.GA491548@ax162> (raw)
In-Reply-To: <13c5072c-dc93-477c-b72e-02156a0ecc2e@app.fastmail.com>
On Thu, Sep 25, 2025 at 03:05:52PM +0200, Arnd Bergmann wrote:
> On the other hand, I would in general strongly prefer
>
> if (IS_ENABLED(CONFIG_FOO)) {
> ...
> }
>
> over any of the preprocessor conditionals, both for readability
> and for improving compile-time coverage of the conditional code.
>
> Unfortunately that does not work here because kernel_neon_begin()
> etc are only defined on Arm.
Even if the neon macros/functions were to be dummy defined, I suspect
clang may complain about the vector register clobbers on architectures
other than arm64, since it will validate some inline assembly even in
dead code.
prev parent reply other threads:[~2025-09-25 20:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 11:48 [PATCH net-next V5] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs Tariq Toukan
2025-09-25 11:54 ` Jason Gunthorpe
2025-09-25 12:15 ` Patrisious Haddad
2025-09-25 12:21 ` Jason Gunthorpe
2025-09-25 13:05 ` Arnd Bergmann
2025-09-25 20:30 ` Nathan Chancellor [this message]
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