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From: Nathan Chancellor <nathan@kernel.org>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Paolo Abeni <pabeni@redhat.com>, Tariq Toukan <tariqt@nvidia.com>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Leon Romanovsky <leon@kernel.org>, Mark Bloch <mbloch@nvidia.com>,
	netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
	linux-kernel@vger.kernel.org, Gal Pressman <gal@nvidia.com>,
	Leon Romanovsky <leonro@nvidia.com>,
	Michael Guralnik <michaelgur@nvidia.com>,
	Moshe Shemesh <moshe@nvidia.com>, Will Deacon <will@kernel.org>,
	Alexander Gordeev <agordeev@linux.ibm.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Christian Borntraeger <borntraeger@linux.ibm.com>,
	Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Gerald Schaefer <gerald.schaefer@linux.ibm.com>,
	Vasily Gorbik <gor@linux.ibm.com>,
	Heiko Carstens <hca@linux.ibm.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Justin Stitt <justinstitt@google.com>,
	linux-s390@vger.kernel.org, llvm@lists.linux.dev,
	Ingo Molnar <mingo@redhat.com>, Bill Wendling <morbo@google.com>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Salil Mehta <salil.mehta@huawei.com>,
	Sven Schnelle <svens@linux.ibm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	x86@kernel.org, Yisen Zhuang <yisen.zhuang@huawei.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Leon Romanovsky <leonro@mellanox.com>,
	linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Guralnik <michaelgur@mellanox.com>,
	patches@lists.linux.dev, Niklas Schnelle <schnelle@linux.ibm.com>,
	Jijie Shao <shaojijie@huawei.com>,
	Simon Horman <horms@kernel.org>,
	Patrisious Haddad <phaddad@nvidia.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	Eric Dumazet <edumazet@google.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Jakub Kicinski <kuba@kernel.org>,
	"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs
Date: Wed, 1 Oct 2025 09:36:55 -0700	[thread overview]
Message-ID: <20251001163655.GA370262@ax162> (raw)
In-Reply-To: <20251001145514.GC3024065@nvidia.com>

On Wed, Oct 01, 2025 at 11:55:14AM -0300, Jason Gunthorpe wrote:
> On Wed, Oct 01, 2025 at 11:28:09AM +0200, Paolo Abeni wrote:
> 
> > > +static void mlx5_iowrite64_copy(struct mlx5_wc_sq *sq, __be32 mmio_wqe[16],
> > > +				size_t mmio_wqe_size, unsigned int offset)
> > > +{
> > > +#if IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && IS_ENABLED(CONFIG_ARM64)
> > > +	if (cpu_has_neon()) {
> > > +		kernel_neon_begin();
> > > +		asm volatile
> > > +		(".arch_extension simd;\n\t"
> > 
> > Here I'm observing build errors with aarch64-linux-gnu-gcc 12.1.1
> > 20220507 (Red Hat Cross 12.1.1-1):
> 
> > /tmp/cchqHdeI.s: Assembler messages:
> > /tmp/cchqHdeI.s:746: Error: unknown architectural extension `simd;'
> 
> This is a binutils error not gcc.. What is the binutils version?

I can reproduce this with at least binutils 2.36.1, which is in the
kernel.org GCC 8.5.0 toolchain.

Removing the semicolon resolves the issue for me and matches the format
of .arch_extension in the rest of the kernel. I am guessing binutils
became less strict with parsing at some point.

Cheers,
Nathan

  reply	other threads:[~2025-10-01 16:37 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-28 21:08 [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs Tariq Toukan
2025-10-01  0:30 ` patchwork-bot+netdevbpf
2025-10-01  9:28 ` Paolo Abeni
2025-10-01 14:55   ` Jason Gunthorpe
2025-10-01 16:36     ` Nathan Chancellor [this message]
2025-10-01 16:45       ` Nathan Chancellor
2025-10-06 13:57 ` Sebastian Ott
2025-10-06 13:59   ` Arnd Bergmann

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