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Tue, 07 Oct 2025 06:12:04 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGT7tdOb3f7jG19ZBDrImwLtnWHUbAeRUbWk2BcC92rUoxdRTRiqP6oot8pZjHCQhcH7rexKA== X-Received: by 2002:a5d:588d:0:b0:410:3a4f:1298 with SMTP id ffacd0b85a97d-4256714d018mr11824111f8f.15.1759842723902; Tue, 07 Oct 2025 06:12:03 -0700 (PDT) Received: from fedora ([85.93.96.130]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8a6b40sm25522990f8f.2.2025.10.07.06.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 06:12:03 -0700 (PDT) Date: Tue, 7 Oct 2025 15:11:57 +0200 From: Igor Mammedov To: Alexander Gryanko Cc: qemu-devel@nongnu.org, Peter Maydell , qemu-arm@nongnu.org, qemu-trivial@nongnu.org Subject: Re: [PATCH] hw/arm: add pvpanic mmio device for arm Message-ID: <20251007151157.5a601c3e@fedora> In-Reply-To: References: X-Mailer: Claws Mail 4.3.1 (GTK 3.24.49; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: nW7BOpfSqJYdKs3VikvZ-2F5TrWLM0UmSEG5QmS-nKc_1759842724 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.422, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-trivial@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-trivial-bounces+qemu-trivial=archiver.kernel.org@nongnu.org Sender: qemu-trivial-bounces+qemu-trivial=archiver.kernel.org@nongnu.org On Sat, 4 Oct 2025 23:19:09 +0300 Alexander Gryanko wrote: > Currently, pvpanic is available in three device types: ISA, > MMIO, and PCI. For early stages of system initialisation > before PCI enumeration, only ISA and MMIO are suitable. > ISA is specific to the x86 platform; only MMIO devices > can be used for ARM. It is not possible to specify a > device as on the x86 platform (-device pvpanic); the perhaps ARM folsk know better, don't we have some user create-able sysbus devices? Can it be implemented as such, so we would avoid creating built-in device? > only possible way is to add an MMIO device to the dtb, > which can be implemented by manually adding new functions > to the QEMU code, as was done in the VMApple implementation. > > Signed-off-by: Alexander Gryanko > --- > hw/arm/virt.c | 25 +++++++++++++++++++++++++ > include/hw/arm/virt.h | 1 + > 2 files changed, 26 insertions(+) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 02209fadcf..1059584b67 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -39,6 +39,7 @@ > #include "hw/arm/virt.h" > #include "hw/block/flash.h" > #include "hw/display/ramfb.h" > +#include "hw/misc/pvpanic.h" > #include "net/net.h" > #include "system/device_tree.h" > #include "system/numa.h" > @@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = { > [VIRT_UART0] = { 0x09000000, 0x00001000 }, > [VIRT_RTC] = { 0x09010000, 0x00001000 }, > [VIRT_FW_CFG] = { 0x09020000, 0x00000018 }, > + [VIRT_PVPANIC] = { 0x09021000, 0x00000002 }, > [VIRT_GPIO] = { 0x09030000, 0x00001000 }, > [VIRT_UART1] = { 0x09040000, 0x00001000 }, > [VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN }, > @@ -276,6 +278,27 @@ static bool ns_el2_virt_timer_present(void) > arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu); > } > > +static void create_pvpanic(VirtMachineState *vms) > +{ > + char *nodename; > + MachineState *ms = MACHINE(vms); > + DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE); > + SysBusDevice *s = SYS_BUS_DEVICE(dev); > + > + hwaddr base = vms->memmap[VIRT_PVPANIC].base; > + hwaddr size = vms->memmap[VIRT_PVPANIC].size; > + > + sysbus_realize_and_unref(s, &error_fatal); > + sysbus_mmio_map(s, 0, base); > + > + nodename = g_strdup_printf("/pvpanic@%" PRIx64, base); > + qemu_fdt_add_subnode(ms->fdt, nodename); > + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", > + "qemu,pvpanic-mmio"); > + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", > + 2, base, 2, size); > +} > + > static void create_fdt(VirtMachineState *vms) > { > MachineState *ms = MACHINE(vms); > @@ -2498,6 +2521,8 @@ static void machvirt_init(MachineState *machine) > create_pcie(vms); > create_cxl_host_reg_region(vms); > > + create_pvpanic(vms); given that virt is versioned machine type, we probably need a compat knob to disable it's creation on old machine types > + > if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) { > vms->acpi_dev = create_acpi_ged(vms); > } else { > diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h > index ea2cff05b0..39bf07c9c1 100644 > --- a/include/hw/arm/virt.h > +++ b/include/hw/arm/virt.h > @@ -81,6 +81,7 @@ enum { > VIRT_NVDIMM_ACPI, > VIRT_PVTIME, > VIRT_ACPI_PCIHP, > + VIRT_PVPANIC, > VIRT_LOWMEMMAP_LAST, > }; > > > --- > base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628 > change-id: 20251004-arm-pvpanic-84a7d7b67d8d > > Best regards,