From: "Mario Limonciello (AMD)" <superm1@kernel.org>
To: amd-gfx@lists.freedesktop.org
Cc: "Mario Limonciello (AMD)" <superm1@kernel.org>
Subject: [PATCH v5 3/5] drm/amd: Add an unwind for failures in amdgpu_device_ip_suspend_phase2()
Date: Sat, 25 Oct 2025 23:29:38 -0500 [thread overview]
Message-ID: <20251026042942.549389-4-superm1@kernel.org> (raw)
In-Reply-To: <20251026042942.549389-1-superm1@kernel.org>
If any hardware IPs involved with the second phase of suspend fail, unwind
all steps to restore back to original state.
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 36 ++++++++++++++++++++--
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b9ea91b2c92f..5945f441d01e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -178,6 +178,9 @@ struct amdgpu_init_level amdgpu_init_minimal_xgmi = {
BIT(AMD_IP_BLOCK_TYPE_COMMON) | BIT(AMD_IP_BLOCK_TYPE_IH) |
BIT(AMD_IP_BLOCK_TYPE_PSP)
};
+
+static int amdgpu_device_ip_resume_phase1(struct amdgpu_device *adev);
+static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev);
static int amdgpu_device_ip_resume_phase3(struct amdgpu_device *adev);
static void amdgpu_device_load_switch_state(struct amdgpu_device *adev);
@@ -3840,7 +3843,7 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
*/
static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
{
- int i, r;
+ int i, r, rec;
if (adev->in_s0ix)
amdgpu_dpm_gfx_state_change(adev, sGpuChangeState_D3Entry);
@@ -3903,7 +3906,7 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
r = amdgpu_ip_block_suspend(&adev->ip_blocks[i]);
if (r)
- return r;
+ goto unwind;
/* handle putting the SMC in the appropriate state */
if (!amdgpu_sriov_vf(adev)) {
@@ -3913,13 +3916,40 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
dev_err(adev->dev,
"SMC failed to set mp1 state %d, %d\n",
adev->mp1_state, r);
- return r;
+ goto unwind;
}
}
}
}
return 0;
+unwind:
+ /* suspend phase 2 = resume phase 1 + resume phase 2 */
+ rec = amdgpu_device_ip_resume_phase1(adev);
+ if (rec) {
+ dev_err(adev->dev,
+ "amdgpu_device_ip_resume_phase1 failed during unwind: %d\n",
+ rec);
+ return r;
+ }
+
+ rec = amdgpu_device_fw_loading(adev);
+ if (rec) {
+ dev_err(adev->dev,
+ "amdgpu_device_fw_loading failed during unwind: %d\n",
+ rec);
+ return r;
+ }
+
+ rec = amdgpu_device_ip_resume_phase2(adev);
+ if (rec) {
+ dev_err(adev->dev,
+ "amdgpu_device_ip_resume_phase2 failed during unwind: %d\n",
+ rec);
+ return r;
+ }
+
+ return r;
}
/**
--
2.51.1
next prev parent reply other threads:[~2025-10-26 4:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-26 4:29 [PATCH v5 0/5] Unwind failed suspend Mario Limonciello (AMD)
2025-10-26 4:29 ` [PATCH v5 1/5] drm/amdgpu: Drop PMFW RLC notifier from amdgpu_device_suspend() Mario Limonciello (AMD)
2025-10-31 12:01 ` Antheas Kapenekakis
2025-10-31 12:59 ` Mario Limonciello (AMD) (kernel.org)
2025-10-26 4:29 ` [PATCH v5 2/5] drm/amd: Add an unwind for failures in amdgpu_device_ip_suspend_phase1() Mario Limonciello (AMD)
2025-10-30 15:14 ` Alex Deucher
2025-10-30 15:16 ` Mario Limonciello (AMD) (kernel.org)
2025-10-30 15:18 ` Alex Deucher
2025-10-30 15:20 ` Mario Limonciello (AMD) (kernel.org)
2025-10-26 4:29 ` Mario Limonciello (AMD) [this message]
2025-10-26 4:29 ` [PATCH v5 4/5] drm/amd: Unwind for failed device suspend Mario Limonciello (AMD)
2025-10-26 4:29 ` [PATCH v5 5/5] drm/amd: Reset the GPU if pmops failed Mario Limonciello (AMD)
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