From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
Cc: Dave Jiang <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>,
<dave@stgolabs.net>, <alison.schofield@intel.com>,
<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
<dan.j.williams@intel.com>
Subject: Re: [PATCH v3] cxl/region: Add support to indicate region has extended linear cache
Date: Tue, 28 Oct 2025 14:41:25 +0000 [thread overview]
Message-ID: <20251028144125.0000133b@huawei.com> (raw)
In-Reply-To: <5e9e4ac9-c0e1-4c30-b4da-1f97e14bdb39@amd.com>
On Fri, 24 Oct 2025 12:05:31 -0500
"Cheatham, Benjamin" <benjamin.cheatham@amd.com> wrote:
> On 10/22/2025 3:30 PM, Dave Jiang wrote:
> > Add a region sysfs attribute to show the size of the extended linear
> > cache if there is any. The attribute is invisible when the cache
> > size is 0, which indicates it does not exist.
> >
> > Moved the cxl_region_visible() location in order to pick up the
> > new sysfs attribute definition.
> >
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>
> I pointed out a few typos below, but contents look good so:
>
> Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
With the bits Ben noted tidied up, looks good to me too.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
next prev parent reply other threads:[~2025-10-28 14:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 20:30 [PATCH v3] cxl/region: Add support to indicate region has extended linear cache Dave Jiang
2025-10-24 17:05 ` Cheatham, Benjamin
2025-10-28 14:41 ` Jonathan Cameron [this message]
2025-10-29 1:34 ` Alison Schofield
2025-11-03 23:49 ` Dave Jiang
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