From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>,
<aik@amd.com>, <yilun.xu@linux.intel.com>,
<aneesh.kumar@kernel.org>, <bhelgaas@google.com>,
<gregkh@linuxfoundation.org>
Subject: Re: [PATCH v7 9/9] PCI/TSM: Report active IDE streams
Date: Wed, 29 Oct 2025 16:34:38 +0000 [thread overview]
Message-ID: <20251029163438.00001391@huawei.com> (raw)
In-Reply-To: <20251024020418.1366664-10-dan.j.williams@intel.com>
On Thu, 23 Oct 2025 19:04:18 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> Given that the platform TSM owns IDE Stream ID allocation, report the
> active streams via the TSM class device. Establish a symlink from the
> class device to the PCI endpoint device consuming the stream, named by
> the Stream ID.
>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Couple of trivial things noticed whilst refreshing my memory.
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
> diff --git a/drivers/virt/coco/tsm-core.c b/drivers/virt/coco/tsm-core.c
> index 4499803cf20d..c0dae531b64f 100644
> --- a/drivers/virt/coco/tsm-core.c
> +++ b/drivers/virt/coco/tsm-core.c
> @@ -2,14 +2,17 @@
> /* Copyright(c) 2024 Intel Corporation. All rights reserved. */
>
> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +#define dev_fmt(fmt) KBUILD_MODNAME ": " fmt
Why is this dev_fmt() in this patch (which doesn't seem to introduce
anything that would use it)?
>
> #include <linux/tsm.h>
> #include <linux/idr.h>
> +#include <linux/pci.h>
> #include <linux/rwsem.h>
> #include <linux/device.h>
> #include <linux/module.h>
> #include <linux/cleanup.h>
> #include <linux/pci-tsm.h>
> +#include <linux/pci-ide.h>
>
> static struct class *tsm_class;
> static DECLARE_RWSEM(tsm_rwsem);
> @@ -106,6 +109,32 @@ void tsm_unregister(struct tsm_dev *tsm_dev)
> }
> EXPORT_SYMBOL_GPL(tsm_unregister);
>
> +/* must be invoked between tsm_register / tsm_unregister */
> +int tsm_ide_stream_register(struct pci_ide *ide)
> +{
> + struct pci_dev *pdev = ide->pdev;
> + struct pci_tsm *tsm = pdev->tsm;
> + struct tsm_dev *tsm_dev = tsm->tsm_dev;
> + int rc;
> +
> + rc = sysfs_create_link(&tsm_dev->dev.kobj, &pdev->dev.kobj, ide->name);
> + if (rc)
> + return rc;
> +
> + ide->tsm_dev = tsm_dev;
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(tsm_ide_stream_register);
> +
> +void tsm_ide_stream_unregister(struct pci_ide *ide)
> +{
> + struct tsm_dev *tsm_dev = ide->tsm_dev;
> +
> + sysfs_remove_link(&tsm_dev->dev.kobj, ide->name);
> + ide->tsm_dev = NULL;
Trivial preference for reverse order of register. That means
setting this NULL before removing the link.
> +}
> +EXPORT_SYMBOL_GPL(tsm_ide_stream_unregister);
> +
> static void tsm_release(struct device *dev)
> {
> struct tsm_dev *tsm_dev = container_of(dev, typeof(*tsm_dev), dev);
next prev parent reply other threads:[~2025-10-29 16:34 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-24 2:04 [PATCH v7 0/9] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2025-10-24 2:04 ` [PATCH v7 1/9] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-10-29 13:33 ` Jonathan Cameron
2025-10-29 23:47 ` dan.j.williams
2025-10-30 1:00 ` Alexey Kardashevskiy
2025-10-30 9:04 ` Carlos López
2025-10-30 23:16 ` dan.j.williams
2025-10-24 2:04 ` [PATCH v7 2/9] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-10-29 13:42 ` Jonathan Cameron
2025-10-29 23:55 ` dan.j.williams
2025-10-30 0:59 ` Alexey Kardashevskiy
2025-10-30 21:13 ` dan.j.williams
2025-10-30 21:37 ` Bjorn Helgaas
2025-10-30 23:56 ` Alexey Kardashevskiy
2025-10-31 0:34 ` dan.j.williams
2025-10-31 1:20 ` Bjorn Helgaas
2025-10-30 8:34 ` Aneesh Kumar K.V
2025-10-24 2:04 ` [PATCH v7 3/9] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-10-29 14:00 ` Jonathan Cameron
2025-10-29 16:05 ` dan.j.williams
2025-10-30 19:36 ` dan.j.williams
2025-10-24 2:04 ` [PATCH v7 4/9] PCI/TSM: Establish Secure Sessions and Link Encryption Dan Williams
2025-10-26 3:18 ` kernel test robot
2025-10-29 15:53 ` Jonathan Cameron
2025-10-30 19:56 ` dan.j.williams
2025-10-30 1:13 ` Alexey Kardashevskiy
2025-10-30 8:35 ` Aneesh Kumar K.V
2025-10-24 2:04 ` [PATCH v7 5/9] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-10-24 2:04 ` [PATCH v7 6/9] PCI: Establish document for PCI host bridge sysfs attributes Dan Williams
2025-10-29 16:04 ` Jonathan Cameron
2025-10-24 2:04 ` [PATCH v7 7/9] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-10-25 16:53 ` Aneesh Kumar K.V
2025-10-29 18:57 ` dan.j.williams
2025-10-29 16:25 ` Jonathan Cameron
2025-10-24 2:04 ` [PATCH v7 8/9] PCI/IDE: Report available IDE streams Dan Williams
2025-10-29 16:31 ` Jonathan Cameron
2025-10-30 20:48 ` dan.j.williams
2025-10-24 2:04 ` [PATCH v7 9/9] PCI/TSM: Report active " Dan Williams
2025-10-29 16:34 ` Jonathan Cameron [this message]
2025-10-30 21:03 ` dan.j.williams
2025-10-30 2:05 ` Alexey Kardashevskiy
2025-10-27 10:01 ` [PATCH v7 0/9] PCI/TSM: Core infrastructure for PCI device security (TDISP) Aneesh Kumar K.V
2025-10-29 5:20 ` Alexey Kardashevskiy
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