From: Dan Williams <dan.j.williams@intel.com>
To: linux-pci@vger.kernel.org
Cc: linux-coco@lists.linux.dev, gregkh@linuxfoundation.org,
aik@amd.com, aneesh.kumar@kernel.org, yilun.xu@linux.intel.com,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Jonathan Cameron" <jonathan.cameron@huawei.com>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"Lukas Wunner" <lukas@wunner.de>,
"Samuel Ortiz" <sameo@rivosinc.com>
Subject: [PATCH v8 0/9] PCI/TSM: Core infrastructure for PCI device security (TDISP)
Date: Fri, 31 Oct 2025 14:28:52 -0700 [thread overview]
Message-ID: <20251031212902.2256310-1-dan.j.williams@intel.com> (raw)
Changes since v7 [1]:
- Pick up Reviewed-by tags from Jonathan, Alexey, and Aneesh.
- Simplify put_tsm_dev() (Jonathan)
- Misc cleanups (Jonathan)
- Drop IDR usage (switched to class_find_device()) (Carlos)
- Keep local drivers/bus/pci.c style for pci_walk_bus_reverse() (Jonathan)
- Clarify commit message for "PCI/TSM: Establish Secure Sessions and
Link Encryption" (Jonathan)
- Fixup up documentation for 'struct pci_tsm_ops' (Jonathan)
- Clarify DSM lifetime comment (Jonathan)
- Fix alloc_stream_index() when the host bridge supports 256 streams
(Aneesh)
- Drop PCI_IDE_ATTR_GROUP in favor of ifdef in C (Jonathan)
- Mirror setup sequence at unwind in tsm_unregister() (Jonathan)
[1]: http://lore.kernel.org/20251024020418.1366664-1-dan.j.williams@intel.com
This set will be available on Monday at
https://git.kernel.org/pub/scm/linux/kernel/git/devsec/tsm.git/log/?h=staging
(rebasing branch) or devsec-20251103 (immutable tag). That branch
additionally contains address association support, Stream ID uniqueness
compability quirk, updated samples/devsec/ (now with multifunction
device and simple bind support), and an updated preview of v2 of "[PATCH
0/7] PCI/TSM: TEE I/O infrastructure" (fixes x86 encrypted ioremap and
other changes) [2].
[2]: http://lore.kernel.org/20250827035259.1356758-1-dan.j.williams@intel.com
It passes an updated regression test using samples/devsec/. See this
commit on the staging branch for that test:
https://git.kernel.org/pub/scm/linux/kernel/git/devsec/tsm.git/commit/?id=44932bffdcc1
Status: sufficient review for linux-next
----------------------------------------
Thanks to the folks that gave this topic another review this past week.
At this point it feels ready for linux-next exposure especially after
seeing work-in-progress rebases for SEV-TIO, CCA, and TDX Connect.
Next steps:
-----------
- Push this series to linux-next
- Post the next rev of "PCI/TSM: TEE I/O infrastructure"
- See at least one vendor "connect" implementation queued in an arch
tree, or pull one into tsm.git
Updated Cover letter:
---------------------
Trusted execution environment (TEE) Device Interface Security Protocol
(TDISP) is a chapter name in the PCI Express Base Specification (r7.0).
It describes an alphabet soup of mechanisms, SPDM, CMA, IDE, TSM/DSM,
that system software uses to establish trust in a device and assign it
to a confidential virtual machine (CVM). It is a protocol for
dynamically extending the Trusted Computing Boundary (TCB) of a CVM with
a PCI device interface enabled to issue DMA to CVM private memory.
The acronym soup problem is extended by each platform architecture
having distinct TEE Security Manager (TSM) API implementations /
capabilities, and each endpoint Device Security Manager (DSM) having its
own idiosyncratic behaviors and requirements around TDISP state
transitions.
Despite all that opportunity for differentiation, there is a significant
portion of the implementation that is cross-vendor common. The PCI/TSM
extension of the PCI core subsystem is a library for TSM drivers to
establish link encryption and enable device access to confidential
memory.
This foundational phase is focused on host-side link encryption, the
next phase focuses on guest-side locking and accepting devices, the
phase after that focuses on all the host-side setup for private DMA and
private MMIO. There are more phases beyond that, like device
attestation, but the goal is upstream manageable incremental steps that
provide tangible value to Linux at each step.
Dan Williams (9):
coco/tsm: Introduce a core device for TEE Security Managers
PCI/IDE: Enumerate Selective Stream IDE capabilities
PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse()
PCI/TSM: Establish Secure Sessions and Link Encryption
PCI: Add PCIe Device 3 Extended Capability enumeration
PCI: Establish document for PCI host bridge sysfs attributes
PCI/IDE: Add IDE establishment helpers
PCI/IDE: Report available IDE streams
PCI/TSM: Report active IDE streams
drivers/pci/Kconfig | 18 +
drivers/virt/coco/Kconfig | 3 +
drivers/pci/Makefile | 2 +
drivers/virt/coco/Makefile | 1 +
Documentation/ABI/testing/sysfs-bus-pci | 51 ++
Documentation/ABI/testing/sysfs-class-tsm | 19 +
.../ABI/testing/sysfs-devices-pci-host-bridge | 45 ++
Documentation/driver-api/pci/index.rst | 1 +
Documentation/driver-api/pci/tsm.rst | 21 +
drivers/pci/pci.h | 19 +
include/linux/device/bus.h | 3 +
include/linux/pci-doe.h | 4 +
include/linux/pci-ide.h | 81 +++
include/linux/pci-tsm.h | 157 +++++
include/linux/pci.h | 28 +
include/linux/tsm.h | 17 +
include/uapi/linux/pci_regs.h | 89 +++
drivers/base/bus.c | 38 ++
drivers/pci/bus.c | 39 ++
drivers/pci/doe.c | 2 -
drivers/pci/ide.c | 587 ++++++++++++++++
drivers/pci/pci-sysfs.c | 4 +
drivers/pci/probe.c | 31 +-
drivers/pci/remove.c | 6 +
drivers/pci/search.c | 62 +-
drivers/pci/tsm.c | 643 ++++++++++++++++++
drivers/virt/coco/tsm-core.c | 163 +++++
MAINTAINERS | 7 +-
28 files changed, 2128 insertions(+), 13 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-class-tsm
create mode 100644 Documentation/ABI/testing/sysfs-devices-pci-host-bridge
create mode 100644 Documentation/driver-api/pci/tsm.rst
create mode 100644 include/linux/pci-ide.h
create mode 100644 include/linux/pci-tsm.h
create mode 100644 drivers/pci/ide.c
create mode 100644 drivers/pci/tsm.c
create mode 100644 drivers/virt/coco/tsm-core.c
base-commit: 211ddde0823f1442e4ad052a2f30f050145ccada
--
2.51.0
next reply other threads:[~2025-10-31 21:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-31 21:28 Dan Williams [this message]
2025-10-31 21:28 ` [PATCH v8 1/9] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-11-08 15:45 ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 2/9] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-11-08 16:15 ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 3/9] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-10-31 21:28 ` [PATCH v8 4/9] PCI/TSM: Establish Secure Sessions and Link Encryption Dan Williams
2025-11-04 10:46 ` kernel test robot
2025-11-10 3:44 ` Xu Yilun
2025-11-10 23:19 ` dan.j.williams
2025-10-31 21:28 ` [PATCH v8 5/9] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-11-10 3:45 ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 6/9] PCI: Establish document for PCI host bridge sysfs attributes Dan Williams
2025-10-31 21:28 ` [PATCH v8 7/9] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-11-03 15:04 ` Jonathan Cameron
2025-11-10 4:16 ` Xu Yilun
2025-11-10 23:21 ` dan.j.williams
2025-10-31 21:29 ` [PATCH v8 8/9] PCI/IDE: Report available IDE streams Dan Williams
2025-11-10 4:49 ` Xu Yilun
2025-11-10 23:49 ` dan.j.williams
2025-10-31 21:29 ` [PATCH v8 9/9] PCI/TSM: Report active " Dan Williams
2025-11-04 13:24 ` kernel test robot
2025-11-10 4:52 ` Xu Yilun
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