From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BDFE3CCF9F8 for ; Mon, 3 Nov 2025 13:30:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vFudv-0001CE-Ey; Mon, 03 Nov 2025 08:30:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFudl-0001Am-Uo; Mon, 03 Nov 2025 08:30:38 -0500 Received: from [185.176.79.56] (helo=frasgout.his.huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFudi-0003hl-QA; Mon, 03 Nov 2025 08:30:33 -0500 Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4d0XRY5sjpz6L50X; Mon, 3 Nov 2025 21:26:33 +0800 (CST) Received: from dubpeml100005.china.huawei.com (unknown [7.214.146.113]) by mail.maildlp.com (Postfix) with ESMTPS id 874D41402FB; Mon, 3 Nov 2025 21:30:20 +0800 (CST) Received: from localhost (10.203.177.15) by dubpeml100005.china.huawei.com (7.214.146.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Mon, 3 Nov 2025 13:30:19 +0000 Date: Mon, 3 Nov 2025 13:30:18 +0000 To: Shameer Kolothum CC: , , , , , , , , , , , , , , , , Subject: Re: [PATCH v5 08/32] hw/pci/pci: Add optional supports_address_space() callback Message-ID: <20251103133018.00006c8d@huawei.com> In-Reply-To: <20251031105005.24618-9-skolothumtho@nvidia.com> References: <20251031105005.24618-1-skolothumtho@nvidia.com> <20251031105005.24618-9-skolothumtho@nvidia.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.203.177.15] X-ClientProxiedBy: lhrpeml500012.china.huawei.com (7.191.174.4) To dubpeml100005.china.huawei.com (7.214.146.113) X-Host-Lookup-Failed: Reverse DNS lookup failed for 185.176.79.56 (deferred) Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Fri, 31 Oct 2025 10:49:41 +0000 Shameer Kolothum wrote: > Introduce an optional supports_address_space() callback in PCIIOMMUOps to > allow a vIOMMU implementation to reject devices that should not be attached > to it. > > Currently, get_address_space() is the first and mandatory callback into the > vIOMMU layer, which always returns an address space. For certain setups, such > as hardware accelerated vIOMMUs (e.g. ARM SMMUv3 with accel=on), attaching > emulated endpoint devices is undesirable as it may impact the behavior or > performance of VFIO passthrough devices, for example, by triggering > unnecessary invalidations on the host IOMMU. > > The new callback allows a vIOMMU to check and reject unsupported devices > early during PCI device registration. LGTM Reviewed-by: Jonathan Cameron > > Cc: Michael S. Tsirkin > Signed-off-by: Shameer Kolothum > --- > hw/pci/pci.c | 20 ++++++++++++++++++++ > include/hw/pci/pci.h | 17 +++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index 9693d7f10c..fa9cf5dab2 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -135,6 +135,21 @@ static void pci_set_master(PCIDevice *d, bool enable) > d->is_master = enable; /* cache the status */ > } > > +static bool > +pci_device_supports_iommu_address_space(PCIDevice *dev, Error **errp) > +{ > + PCIBus *bus; > + PCIBus *iommu_bus; > + int devfn; > + > + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); > + if (iommu_bus && iommu_bus->iommu_ops->supports_address_space) { > + return iommu_bus->iommu_ops->supports_address_space(bus, > + iommu_bus->iommu_opaque, devfn, errp); > + } > + return true; > +} > + > static void pci_init_bus_master(PCIDevice *pci_dev) > { > AddressSpace *dma_as = pci_device_iommu_address_space(pci_dev); > @@ -1413,6 +1428,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, > pci_dev->config_write = config_write; > bus->devices[devfn] = pci_dev; > pci_dev->version_id = 2; /* Current pci device vmstate version */ > + if (!pci_device_supports_iommu_address_space(pci_dev, errp)) { > + do_pci_unregister_device(pci_dev); > + bus->devices[devfn] = NULL; > + return NULL; > + } > if (phase_check(PHASE_MACHINE_READY)) { > pci_init_bus_master(pci_dev); > } > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h > index cf99b5bb68..dfeba8c9bd 100644 > --- a/include/hw/pci/pci.h > +++ b/include/hw/pci/pci.h > @@ -417,6 +417,23 @@ typedef struct IOMMUPRINotifier { > * framework for a set of devices on a PCI bus. > */ > typedef struct PCIIOMMUOps { > + /** > + * @supports_address_space: Optional pre-check to determine if a PCI > + * device can have an IOMMU address space. > + * > + * @bus: the #PCIBus being accessed. > + * > + * @opaque: the data passed to pci_setup_iommu(). > + * > + * @devfn: device and function number. > + * > + * @errp: pass an Error out only when return false > + * > + * Returns: true if the device can be associated with an IOMMU address > + * space, false otherwise with errp set. > + */ > + bool (*supports_address_space)(PCIBus *bus, void *opaque, int devfn, > + Error **errp); > /** > * @get_address_space: get the address space for a set of devices > * on a PCI bus. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1F3CCCF9FE for ; Mon, 3 Nov 2025 13:32:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vFudy-0001D6-V0; Mon, 03 Nov 2025 08:30:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFudl-0001Am-Uo; Mon, 03 Nov 2025 08:30:38 -0500 Received: from [185.176.79.56] (helo=frasgout.his.huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFudi-0003hl-QA; Mon, 03 Nov 2025 08:30:33 -0500 Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4d0XRY5sjpz6L50X; Mon, 3 Nov 2025 21:26:33 +0800 (CST) Received: from dubpeml100005.china.huawei.com (unknown [7.214.146.113]) by mail.maildlp.com (Postfix) with ESMTPS id 874D41402FB; Mon, 3 Nov 2025 21:30:20 +0800 (CST) Received: from localhost (10.203.177.15) by dubpeml100005.china.huawei.com (7.214.146.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Mon, 3 Nov 2025 13:30:19 +0000 Date: Mon, 3 Nov 2025 13:30:18 +0000 To: Shameer Kolothum CC: , , , , , , , , , , , , , , , , Subject: Re: [PATCH v5 08/32] hw/pci/pci: Add optional supports_address_space() callback Message-ID: <20251103133018.00006c8d@huawei.com> In-Reply-To: <20251031105005.24618-9-skolothumtho@nvidia.com> References: <20251031105005.24618-1-skolothumtho@nvidia.com> <20251031105005.24618-9-skolothumtho@nvidia.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.203.177.15] X-ClientProxiedBy: lhrpeml500012.china.huawei.com (7.191.174.4) To dubpeml100005.china.huawei.com (7.214.146.113) X-Host-Lookup-Failed: Reverse DNS lookup failed for 185.176.79.56 (deferred) Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 31 Oct 2025 10:49:41 +0000 Shameer Kolothum wrote: > Introduce an optional supports_address_space() callback in PCIIOMMUOps to > allow a vIOMMU implementation to reject devices that should not be attached > to it. > > Currently, get_address_space() is the first and mandatory callback into the > vIOMMU layer, which always returns an address space. For certain setups, such > as hardware accelerated vIOMMUs (e.g. ARM SMMUv3 with accel=on), attaching > emulated endpoint devices is undesirable as it may impact the behavior or > performance of VFIO passthrough devices, for example, by triggering > unnecessary invalidations on the host IOMMU. > > The new callback allows a vIOMMU to check and reject unsupported devices > early during PCI device registration. LGTM Reviewed-by: Jonathan Cameron > > Cc: Michael S. Tsirkin > Signed-off-by: Shameer Kolothum > --- > hw/pci/pci.c | 20 ++++++++++++++++++++ > include/hw/pci/pci.h | 17 +++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index 9693d7f10c..fa9cf5dab2 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -135,6 +135,21 @@ static void pci_set_master(PCIDevice *d, bool enable) > d->is_master = enable; /* cache the status */ > } > > +static bool > +pci_device_supports_iommu_address_space(PCIDevice *dev, Error **errp) > +{ > + PCIBus *bus; > + PCIBus *iommu_bus; > + int devfn; > + > + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); > + if (iommu_bus && iommu_bus->iommu_ops->supports_address_space) { > + return iommu_bus->iommu_ops->supports_address_space(bus, > + iommu_bus->iommu_opaque, devfn, errp); > + } > + return true; > +} > + > static void pci_init_bus_master(PCIDevice *pci_dev) > { > AddressSpace *dma_as = pci_device_iommu_address_space(pci_dev); > @@ -1413,6 +1428,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, > pci_dev->config_write = config_write; > bus->devices[devfn] = pci_dev; > pci_dev->version_id = 2; /* Current pci device vmstate version */ > + if (!pci_device_supports_iommu_address_space(pci_dev, errp)) { > + do_pci_unregister_device(pci_dev); > + bus->devices[devfn] = NULL; > + return NULL; > + } > if (phase_check(PHASE_MACHINE_READY)) { > pci_init_bus_master(pci_dev); > } > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h > index cf99b5bb68..dfeba8c9bd 100644 > --- a/include/hw/pci/pci.h > +++ b/include/hw/pci/pci.h > @@ -417,6 +417,23 @@ typedef struct IOMMUPRINotifier { > * framework for a set of devices on a PCI bus. > */ > typedef struct PCIIOMMUOps { > + /** > + * @supports_address_space: Optional pre-check to determine if a PCI > + * device can have an IOMMU address space. > + * > + * @bus: the #PCIBus being accessed. > + * > + * @opaque: the data passed to pci_setup_iommu(). > + * > + * @devfn: device and function number. > + * > + * @errp: pass an Error out only when return false > + * > + * Returns: true if the device can be associated with an IOMMU address > + * space, false otherwise with errp set. > + */ > + bool (*supports_address_space)(PCIBus *bus, void *opaque, int devfn, > + Error **errp); > /** > * @get_address_space: get the address space for a set of devices > * on a PCI bus.