From: kernel test robot <lkp@intel.com>
To: oe-kbuild@lists.linux.dev
Cc: lkp@intel.com, Dan Carpenter <error27@gmail.com>
Subject: [avpatel:riscv_trace_support_v1 30/57] drivers/firmware/riscv/riscv_sbi_sse.c:505 sse_event_register() error: uninitialized symbol 'preferred_hart'.
Date: Tue, 4 Nov 2025 06:22:38 +0800 [thread overview]
Message-ID: <202511040647.EOR2ShWh-lkp@intel.com> (raw)
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
TO: "Clément Léger" <cleger@rivosinc.com>
CC: Anup Patel <anup@brainfault.org>
CC: Himanshu Chauhan <hchauhan@ventanamicro.com>
tree: https://github.com/avpatel/linux.git riscv_trace_support_v1
head: 3f71314c58520f6fada72d7f0364429fc3e8bf50
commit: 3e89594245fa2cf4bd298955d807fcd625294f22 [30/57] drivers: firmware: add riscv SSE support
:::::: branch date: 7 days ago
:::::: commit date: 7 days ago
config: riscv-randconfig-r071-20251103 (https://download.01.org/0day-ci/archive/20251104/202511040647.EOR2ShWh-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 15.1.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Closes: https://lore.kernel.org/r/202511040647.EOR2ShWh-lkp@intel.com/
smatch warnings:
drivers/firmware/riscv/riscv_sbi_sse.c:505 sse_event_register() error: uninitialized symbol 'preferred_hart'.
vim +/preferred_hart +505 drivers/firmware/riscv/riscv_sbi_sse.c
3e89594245fa2c Clément Léger 2025-09-08 476
3e89594245fa2c Clément Léger 2025-09-08 477 struct sse_event *sse_event_register(u32 evt, u32 priority,
3e89594245fa2c Clément Léger 2025-09-08 478 sse_event_handler_fn *handler, void *arg)
3e89594245fa2c Clément Léger 2025-09-08 479 {
3e89594245fa2c Clément Léger 2025-09-08 480 struct sse_event *event;
3e89594245fa2c Clément Léger 2025-09-08 481 int cpu;
3e89594245fa2c Clément Léger 2025-09-08 482 int ret = 0;
3e89594245fa2c Clément Léger 2025-09-08 483
3e89594245fa2c Clément Léger 2025-09-08 484 if (!sse_available)
3e89594245fa2c Clément Léger 2025-09-08 485 return ERR_PTR(-EOPNOTSUPP);
3e89594245fa2c Clément Léger 2025-09-08 486
3e89594245fa2c Clément Léger 2025-09-08 487 guard(mutex)(&sse_mutex);
3e89594245fa2c Clément Léger 2025-09-08 488 if (sse_event_get(evt))
3e89594245fa2c Clément Léger 2025-09-08 489 return ERR_PTR(-EEXIST);
3e89594245fa2c Clément Léger 2025-09-08 490
3e89594245fa2c Clément Léger 2025-09-08 491 event = sse_event_alloc(evt, priority, handler, arg);
3e89594245fa2c Clément Léger 2025-09-08 492 if (IS_ERR(event))
3e89594245fa2c Clément Léger 2025-09-08 493 return event;
3e89594245fa2c Clément Léger 2025-09-08 494
3e89594245fa2c Clément Léger 2025-09-08 495 scoped_guard(cpus_read_lock) {
3e89594245fa2c Clément Léger 2025-09-08 496 if (sse_event_is_global(evt)) {
3e89594245fa2c Clément Léger 2025-09-08 497 unsigned long preferred_hart;
3e89594245fa2c Clément Léger 2025-09-08 498
3e89594245fa2c Clément Léger 2025-09-08 499 ret = sse_event_attr_get_no_lock(event->global,
3e89594245fa2c Clément Léger 2025-09-08 500 SBI_SSE_ATTR_PREFERRED_HART,
3e89594245fa2c Clément Léger 2025-09-08 501 &preferred_hart);
3e89594245fa2c Clément Léger 2025-09-08 502 if (ret)
3e89594245fa2c Clément Léger 2025-09-08 503 goto err_event_free;
3e89594245fa2c Clément Léger 2025-09-08 504
3e89594245fa2c Clément Léger 2025-09-08 @505 cpu = riscv_hartid_to_cpuid(preferred_hart);
3e89594245fa2c Clément Léger 2025-09-08 506 sse_global_event_update_cpu(event, cpu);
3e89594245fa2c Clément Léger 2025-09-08 507
3e89594245fa2c Clément Léger 2025-09-08 508 ret = sse_sbi_register_event(event, event->global);
3e89594245fa2c Clément Léger 2025-09-08 509 if (ret)
3e89594245fa2c Clément Léger 2025-09-08 510 goto err_event_free;
3e89594245fa2c Clément Léger 2025-09-08 511
3e89594245fa2c Clément Léger 2025-09-08 512 } else {
3e89594245fa2c Clément Léger 2025-09-08 513 ret = sse_on_each_cpu(event, SBI_SSE_EVENT_REGISTER,
3e89594245fa2c Clément Léger 2025-09-08 514 SBI_SSE_EVENT_DISABLE);
3e89594245fa2c Clément Léger 2025-09-08 515 if (ret)
3e89594245fa2c Clément Léger 2025-09-08 516 goto err_event_free;
3e89594245fa2c Clément Léger 2025-09-08 517 }
3e89594245fa2c Clément Léger 2025-09-08 518 }
3e89594245fa2c Clément Léger 2025-09-08 519
3e89594245fa2c Clément Léger 2025-09-08 520 scoped_guard(spinlock, &events_list_lock)
3e89594245fa2c Clément Léger 2025-09-08 521 list_add(&event->list, &events);
3e89594245fa2c Clément Léger 2025-09-08 522
3e89594245fa2c Clément Léger 2025-09-08 523 return event;
3e89594245fa2c Clément Léger 2025-09-08 524
3e89594245fa2c Clément Léger 2025-09-08 525 err_event_free:
3e89594245fa2c Clément Léger 2025-09-08 526 sse_event_free(event);
3e89594245fa2c Clément Léger 2025-09-08 527
3e89594245fa2c Clément Léger 2025-09-08 528 return ERR_PTR(ret);
3e89594245fa2c Clément Léger 2025-09-08 529 }
3e89594245fa2c Clément Léger 2025-09-08 530 EXPORT_SYMBOL_GPL(sse_event_register);
3e89594245fa2c Clément Léger 2025-09-08 531
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2025-11-03 22:23 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202511040647.EOR2ShWh-lkp@intel.com \
--to=lkp@intel.com \
--cc=error27@gmail.com \
--cc=oe-kbuild@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.