From: kernel test robot <lkp@intel.com>
To: Gatien Chevallier <gatien.chevallier@foss.st.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: oe-kbuild-all@lists.linux.dev, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Gatien Chevallier <gatien.chevallier@foss.st.com>
Subject: Re: [PATCH 3/3] bus: rifsc: add debugfs entry to dump the firewall configuration
Date: Thu, 6 Nov 2025 04:55:22 +0800 [thread overview]
Message-ID: <202511060449.FdKTConU-lkp@intel.com> (raw)
In-Reply-To: <20251104-rifsc_debugfs-v1-3-7ebdfbf8d33f@foss.st.com>
Hi Gatien,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 6146a0f1dfae5d37442a9ddcba012add260bceb0]
url: https://github.com/intel-lab-lkp/linux/commits/Gatien-Chevallier/dt-bindings-bus-add-stm32mp21-RIFSC-compatible/20251104-215726
base: 6146a0f1dfae5d37442a9ddcba012add260bceb0
patch link: https://lore.kernel.org/r/20251104-rifsc_debugfs-v1-3-7ebdfbf8d33f%40foss.st.com
patch subject: [PATCH 3/3] bus: rifsc: add debugfs entry to dump the firewall configuration
config: csky-randconfig-r062-20251105 (https://download.01.org/0day-ci/archive/20251106/202511060449.FdKTConU-lkp@intel.com/config)
compiler: csky-linux-gcc (GCC) 15.1.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202511060449.FdKTConU-lkp@intel.com/
cocci warnings: (new ones prefixed by >>)
>> drivers/bus/stm32_rifsc.c:538:6-33: opportunity for str_enabled_disabled(d_dbg_entry . dev_cid_filt_en)
>> drivers/bus/stm32_rifsc.c:540:6-28: opportunity for str_enabled_disabled(d_dbg_entry . dev_sem_en)
>> drivers/bus/stm32_rifsc.c:596:8-30: opportunity for str_enabled_disabled(sr_dbg_entry . sr_enable)
vim +538 drivers/bus/stm32_rifsc.c
505
506 static int stm32_rifsc_conf_dump_show(struct seq_file *s, void *data)
507 {
508 struct rifsc_dbg_private *rifsc = (struct rifsc_dbg_private *)s->private;
509 int i, j;
510
511 seq_puts(s, "\n=============================================\n");
512 seq_puts(s, " RIFSC dump\n");
513 seq_puts(s, "=============================================\n\n");
514
515 seq_puts(s, "\n=============================================\n");
516 seq_puts(s, " RISUP dump\n");
517 seq_puts(s, "=============================================\n");
518
519 seq_printf(s, "\n| %-15s |", "Peripheral name");
520 seq_puts(s, "| Firewall ID |");
521 seq_puts(s, "| N/SECURE |");
522 seq_puts(s, "| N/PRIVILEGED |");
523 seq_puts(s, "| CID filtering |");
524 seq_puts(s, "| Semaphore mode |");
525 seq_puts(s, "| SCID |");
526 seq_printf(s, "| %7s |\n", "SEMWL");
527
528 for (i = 0; i < RIFSC_RISUP_ENTRIES && i < rifsc->nb_risup; i++) {
529 struct rifsc_risup_debug_data d_dbg_entry;
530
531 stm32_rifsc_fill_dev_dbg_entry(rifsc, &d_dbg_entry, i);
532
533 seq_printf(s, "| %-15s |", d_dbg_entry.dev_name);
534 seq_printf(s, "| %-11d |", d_dbg_entry.dev_id);
535 seq_printf(s, "| %-8s |", d_dbg_entry.dev_sec ? "SEC" : "NSEC");
536 seq_printf(s, "| %-12s |", d_dbg_entry.dev_priv ? "PRIV" : "NPRIV");
537 seq_printf(s, "| %-13s |",
> 538 d_dbg_entry.dev_cid_filt_en ? "enabled" : "disabled");
539 seq_printf(s, "| %-14s |",
> 540 d_dbg_entry.dev_sem_en ? "enabled" : "disabled");
541 seq_printf(s, "| %-4d |", d_dbg_entry.dev_cid);
542 seq_printf(s, "| %#-7x |\n", d_dbg_entry.dev_sem_cids);
543 }
544
545 seq_puts(s, "\n=============================================\n");
546 seq_puts(s, " RIMU dump\n");
547 seq_puts(s, "=============================================\n");
548
549 seq_puts(s, "| RIMU's name |");
550 seq_puts(s, "| CIDSEL |");
551 seq_puts(s, "| MCID |");
552 seq_puts(s, "| N/SECURE |");
553 seq_puts(s, "| N/PRIVILEGED |\n");
554
555 for (i = 0; i < RIFSC_RIMU_ENTRIES && rifsc->nb_rimu; i++) {
556 struct rifsc_rimu_debug_data m_dbg_entry;
557
558 stm32_rifsc_fill_rimu_dbg_entry(rifsc, &m_dbg_entry, i);
559
560 seq_printf(s, "| %-11s |", m_dbg_entry.m_name);
561 seq_printf(s, "| %-6s |", m_dbg_entry.cidsel ? "CIDSEL" : "");
562 seq_printf(s, "| %-4d |", m_dbg_entry.m_cid);
563 seq_printf(s, "| %-8s |", m_dbg_entry.m_sec ? "SEC" : "NSEC");
564 seq_printf(s, "| %-12s |\n", m_dbg_entry.m_priv ? "PRIV" : "NPRIV");
565 }
566
567 if (rifsc->nb_risal > 0) {
568 seq_puts(s, "\n=============================================\n");
569 seq_puts(s, " RISAL dump\n");
570 seq_puts(s, "=============================================\n");
571
572 seq_puts(s, "| Memory |");
573 seq_puts(s, "| Subreg. |");
574 seq_puts(s, "| N/SECURE |");
575 seq_puts(s, "| N/PRIVILEGED |");
576 seq_puts(s, "| Subreg. CID |");
577 seq_puts(s, "| Resource lock |");
578 seq_puts(s, "| Subreg. enable |");
579 seq_puts(s, "| Subreg. start |");
580 seq_puts(s, "| Subreg. end |\n");
581
582 for (i = 0; i < rifsc->nb_risal; i++) {
583 for (j = 0; j < RIFSC_RISAL_SUBREGIONS; j++) {
584 struct rifsc_subreg_debug_data sr_dbg_entry;
585
586 stm32_rifsc_fill_subreg_dbg_entry(rifsc, &sr_dbg_entry, i, j);
587
588 seq_printf(s, "| LPSRAM%1d |", i + 1);
589 seq_printf(s, "| %1s |", (j == 0) ? "A" : "B");
590 seq_printf(s, "| %-8s |", sr_dbg_entry.sr_sec ? "SEC" : "NSEC");
591 seq_printf(s, "| %-12s |", sr_dbg_entry.sr_priv ? "PRIV" : "NPRIV");
592 seq_printf(s, "| 0x%-9x |", sr_dbg_entry.sr_cid);
593 seq_printf(s, "| %-13s |",
594 sr_dbg_entry.sr_rlock ? "locked (1)" : "unlocked (0)");
595 seq_printf(s, "| %-14s |",
> 596 sr_dbg_entry.sr_enable ? "enabled" : "disabled");
597
598 seq_printf(s, "| 0x%-11x |", sr_dbg_entry.sr_start);
599 seq_printf(s, "| 0x%-11x |\n", sr_dbg_entry.sr_start +
600 sr_dbg_entry.sr_length - 1);
601 }
602 }
603 }
604
605 return 0;
606 }
607 DEFINE_SHOW_ATTRIBUTE(stm32_rifsc_conf_dump);
608
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
prev parent reply other threads:[~2025-11-05 20:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-04 13:54 [PATCH 0/3] bus: rifsc: add stm32mp21 support and config dump debug entry Gatien Chevallier
2025-11-04 13:54 ` [PATCH 1/3] dt-bindings: bus: add stm32mp21 RIFSC compatible Gatien Chevallier
2025-11-04 17:21 ` Conor Dooley
2025-11-04 13:54 ` [PATCH 2/3] arm64: dts: st: set RIFSC as an access controller on stm32mp21x platforms Gatien Chevallier
2025-11-04 13:54 ` [PATCH 3/3] bus: rifsc: add debugfs entry to dump the firewall configuration Gatien Chevallier
2025-11-05 20:55 ` kernel test robot [this message]
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