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charset=us-ascii Content-Disposition: inline BCC: lkp@intel.com CC: oe-kbuild-all@lists.linux.dev In-Reply-To: <20251102-dmabuf-vfio-v6-11-d773cff0db9f@nvidia.com> References: <20251102-dmabuf-vfio-v6-11-d773cff0db9f@nvidia.com> TO: Leon Romanovsky Hi Leon, kernel test robot noticed the following build warnings: [auto build test WARNING on 3a8660878839faadb4f1a6dd72c3179c1df56787] url: https://github.com/intel-lab-lkp/linux/commits/Leon-Romanovsky/PCI-P2PDMA-Separate-the-mmap-support-from-the-core-logic/20251102-160355 base: 3a8660878839faadb4f1a6dd72c3179c1df56787 patch link: https://lore.kernel.org/r/20251102-dmabuf-vfio-v6-11-d773cff0db9f%40nvidia.com patch subject: [PATCH v6 11/11] vfio/nvgrace: Support get_dmabuf_phys :::::: branch date: 7 days ago :::::: commit date: 7 days ago config: arm64-randconfig-r072-20251109 (https://download.01.org/0day-ci/archive/20251110/202511100152.SyE9Mhps-lkp@intel.com/config) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project b9ea93cd5c37fb6d606502fd01208dd48330549d) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Reported-by: Dan Carpenter | Closes: https://lore.kernel.org/r/202511100152.SyE9Mhps-lkp@intel.com/ New smatch warnings: drivers/vfio/pci/nvgrace-gpu/main.c:706 nvgrace_get_dmabuf_phys() warn: '*provider' is an error pointer or valid Old smatch warnings: drivers/vfio/pci/nvgrace-gpu/main.c:720 nvgrace_get_dmabuf_phys() warn: '*provider' is an error pointer or valid drivers/vfio/pci/nvgrace-gpu/main.c:794 nvgrace_gpu_fetch_memory_property() warn: impossible condition '(*pmemphys > ((((1 << (8 * 8 - 1 - (((-1)) < 1))) - 1) + (1 << (8 * 8 - 1 - (((-1)) < 1)))))) => (0-u64max > u64max)' drivers/vfio/pci/nvgrace-gpu/main.c:802 nvgrace_gpu_fetch_memory_property() warn: impossible condition '(*pmemlength > ((((1 << (8 * 8 - 1 - (((-1)) < 1))) - 1) + (1 << (8 * 8 - 1 - (((-1)) < 1)))))) => (0-u64max > u64max)' vim +706 drivers/vfio/pci/nvgrace-gpu/main.c 701ab935859fcfd Ankit Agrawal 2024-02-20 686 d7ddf63944708fb Jason Gunthorpe 2025-11-02 687 static int nvgrace_get_dmabuf_phys(struct vfio_pci_core_device *core_vdev, d7ddf63944708fb Jason Gunthorpe 2025-11-02 688 struct p2pdma_provider **provider, d7ddf63944708fb Jason Gunthorpe 2025-11-02 689 unsigned int region_index, d7ddf63944708fb Jason Gunthorpe 2025-11-02 690 struct dma_buf_phys_vec *phys_vec, d7ddf63944708fb Jason Gunthorpe 2025-11-02 691 struct vfio_region_dma_range *dma_ranges, d7ddf63944708fb Jason Gunthorpe 2025-11-02 692 size_t nr_ranges) d7ddf63944708fb Jason Gunthorpe 2025-11-02 693 { d7ddf63944708fb Jason Gunthorpe 2025-11-02 694 struct nvgrace_gpu_pci_core_device *nvdev = container_of( d7ddf63944708fb Jason Gunthorpe 2025-11-02 695 core_vdev, struct nvgrace_gpu_pci_core_device, core_device); d7ddf63944708fb Jason Gunthorpe 2025-11-02 696 struct pci_dev *pdev = core_vdev->pdev; d7ddf63944708fb Jason Gunthorpe 2025-11-02 697 d7ddf63944708fb Jason Gunthorpe 2025-11-02 698 if (nvdev->resmem.memlength && region_index == RESMEM_REGION_INDEX) { d7ddf63944708fb Jason Gunthorpe 2025-11-02 699 /* d7ddf63944708fb Jason Gunthorpe 2025-11-02 700 * The P2P properties of the non-BAR memory is the same as the d7ddf63944708fb Jason Gunthorpe 2025-11-02 701 * BAR memory, so just use the provider for index 0. Someday d7ddf63944708fb Jason Gunthorpe 2025-11-02 702 * when CXL gets P2P support we could create CXLish providers d7ddf63944708fb Jason Gunthorpe 2025-11-02 703 * for the non-BAR memory. d7ddf63944708fb Jason Gunthorpe 2025-11-02 704 */ d7ddf63944708fb Jason Gunthorpe 2025-11-02 705 *provider = pcim_p2pdma_provider(pdev, 0); d7ddf63944708fb Jason Gunthorpe 2025-11-02 @706 if (!*provider) d7ddf63944708fb Jason Gunthorpe 2025-11-02 707 return -EINVAL; d7ddf63944708fb Jason Gunthorpe 2025-11-02 708 return vfio_pci_core_fill_phys_vec(phys_vec, dma_ranges, d7ddf63944708fb Jason Gunthorpe 2025-11-02 709 nr_ranges, d7ddf63944708fb Jason Gunthorpe 2025-11-02 710 nvdev->resmem.memphys, d7ddf63944708fb Jason Gunthorpe 2025-11-02 711 nvdev->resmem.memlength); d7ddf63944708fb Jason Gunthorpe 2025-11-02 712 } else if (region_index == USEMEM_REGION_INDEX) { d7ddf63944708fb Jason Gunthorpe 2025-11-02 713 /* d7ddf63944708fb Jason Gunthorpe 2025-11-02 714 * This is actually cachable memory and isn't treated as P2P in d7ddf63944708fb Jason Gunthorpe 2025-11-02 715 * the chip. For now we have no way to push cachable memory d7ddf63944708fb Jason Gunthorpe 2025-11-02 716 * through everything and the Grace HW doesn't care what caching d7ddf63944708fb Jason Gunthorpe 2025-11-02 717 * attribute is programmed into the SMMU. So use BAR 0. d7ddf63944708fb Jason Gunthorpe 2025-11-02 718 */ d7ddf63944708fb Jason Gunthorpe 2025-11-02 719 *provider = pcim_p2pdma_provider(pdev, 0); d7ddf63944708fb Jason Gunthorpe 2025-11-02 720 if (!*provider) d7ddf63944708fb Jason Gunthorpe 2025-11-02 721 return -EINVAL; d7ddf63944708fb Jason Gunthorpe 2025-11-02 722 return vfio_pci_core_fill_phys_vec(phys_vec, dma_ranges, d7ddf63944708fb Jason Gunthorpe 2025-11-02 723 nr_ranges, d7ddf63944708fb Jason Gunthorpe 2025-11-02 724 nvdev->usemem.memphys, d7ddf63944708fb Jason Gunthorpe 2025-11-02 725 nvdev->usemem.memlength); d7ddf63944708fb Jason Gunthorpe 2025-11-02 726 } d7ddf63944708fb Jason Gunthorpe 2025-11-02 727 return vfio_pci_core_get_dmabuf_phys(core_vdev, provider, region_index, d7ddf63944708fb Jason Gunthorpe 2025-11-02 728 phys_vec, dma_ranges, nr_ranges); d7ddf63944708fb Jason Gunthorpe 2025-11-02 729 } d7ddf63944708fb Jason Gunthorpe 2025-11-02 730 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki