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Tue, 11 Nov 2025 10:30:30 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([179.93.21.233]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3434c2ffdecsm15207419a91.2.2025.11.11.10.30.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Nov 2025 10:30:29 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, Daniel Henrique Barboza Subject: [PATCH v4 5/5] docs: add rvsp-ref.rst Date: Tue, 11 Nov 2025 15:29:44 -0300 Message-ID: <20251111182944.2895892-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.51.1 In-Reply-To: <20251111182944.2895892-1-dbarboza@ventanamicro.com> References: <20251111182944.2895892-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Add documentation on the new experimental board rvsp-ref. Signed-off-by: Daniel Henrique Barboza --- docs/system/riscv/rvsp-ref.rst | 28 ++++++++++++++++++++++++++++ docs/system/target-riscv.rst | 1 + 2 files changed, 29 insertions(+) create mode 100644 docs/system/riscv/rvsp-ref.rst diff --git a/docs/system/riscv/rvsp-ref.rst b/docs/system/riscv/rvsp-ref.rst new file mode 100644 index 0000000000..3889fce413 --- /dev/null +++ b/docs/system/riscv/rvsp-ref.rst @@ -0,0 +1,28 @@ +Experimental RISC-V Server Platform Reference board (``rvsp-ref``) +================================================================== + +The RISC-V Server Platform specification `spec`_ defines a standardized +set of hardware and software capabilities that portable system software, +such as OS and hypervisors, can rely on being present in a RISC-V server +platform. This machine aims to emulate this specification, providing +an environment for firmware/OS development and testing. + +The main features included in rvsp-ref are: + +* a new CPU type rvsp-ref CPU for server platform compliance +* AIA +* PCIe AHCI +* PCIe NIC +* No virtio mmio bus +* No fw_cfg device +* No ACPI table +* Minimal device tree nodes + +The board is being provisioned as *experimental* because QEMU isn't +100% compliant with the specification at this moment - we do not have +support for the mandatory 'sdext' extension. The existence of the board +is beneficial to the development of the ecossystem around the specification, +so we're choosing the make the board available even in an incomplete state. +When 'sdext' is implemented we'll remove the 'experimental' tag from it. + +.. _spec: https://github.com/riscv-non-isa/riscv-server-platform diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index 89b2cb732c..2ed337c8cf 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -72,6 +72,7 @@ undocumented; you can get a complete list by running riscv/sifive_u riscv/virt riscv/xiangshan-kunminghu + riscv/rvsp-ref RISC-V CPU firmware ------------------- -- 2.51.1