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From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-pci@vger.kernel.org>, <linux-coco@lists.linux.dev>,
	"Alexey Kardashevskiy" <aik@amd.com>
Subject: Re: [PATCH v2 5/8] PCI/IDE: Initialize an ID for all IDE streams
Date: Thu, 13 Nov 2025 11:52:50 +0000	[thread overview]
Message-ID: <20251113115250.00003864@huawei.com> (raw)
In-Reply-To: <20251113021446.436830-6-dan.j.williams@intel.com>

On Wed, 12 Nov 2025 18:14:43 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> The PCIe spec defines two types of streams - selective and link.  Each
> stream has an ID from the same bucket so a stream ID does not tell the
> type.  The spec defines an "enable" bit for every stream and required
> stream IDs to be unique among all enabled stream but there is no such
> requirement for disabled streams.
> 
> However, when IDE_KM is programming keys, an IDE-capable device needs
> to know the type of stream being programmed to write it directly to
> the hardware as keys are relatively large, possibly many of them and
> devices often struggle with keeping around rather big data not being
> used.
> 
> Walk through all streams on a device and initialise the IDs to some
> unique number, both link and selective.
> 
> The weakest part of this proposal is the host bridge ide_stream_ids_ida.
> Technically, a Stream ID only needs to be unique within a given partner
> pair. However, with "anonymous" / unassigned streams there is no convenient
> place to track the available ids. Proceed with an ida in the host bridge
> for now, but consider moving this tracking to be an ide_stream_ids_ida per
> device.
> 
> Co-developed-by: Alexey Kardashevskiy <aik@amd.com>
> Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>


  reply	other threads:[~2025-11-13 11:52 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-13  2:14 [PATCH v2 0/8] PCI/TSM: Finalize "Link" TSM infrastructure Dan Williams
2025-11-13  2:14 ` [PATCH v2 1/8] drivers/virt: Drop VIRT_DRIVERS build dependency Dan Williams
2025-11-13 11:28   ` Jonathan Cameron
2025-12-02 23:44   ` Nathan Chancellor
2025-12-03  1:51     ` dan.j.williams
2025-11-13  2:14 ` [PATCH v2 2/8] PCI/TSM: Drop stub for pci_tsm_doe_transfer() Dan Williams
2025-11-13 11:29   ` Jonathan Cameron
2025-11-13  2:14 ` [PATCH v2 3/8] resource: Introduce resource_assigned() for discerning active resources Dan Williams
2025-11-13 11:36   ` Jonathan Cameron
2025-11-13  2:14 ` [PATCH v2 4/8] PCI/IDE: Add Address Association Register setup for downstream MMIO Dan Williams
2025-11-13 11:48   ` Jonathan Cameron
2025-11-13 18:54   ` kernel test robot
2025-11-14  1:02   ` [PATCH v3 " Dan Williams
2025-11-19  9:02   ` [PATCH v2 " kernel test robot
2025-11-13  2:14 ` [PATCH v2 5/8] PCI/IDE: Initialize an ID for all IDE streams Dan Williams
2025-11-13 11:52   ` Jonathan Cameron [this message]
2025-11-17 11:11   ` Xu Yilun
2025-11-13  2:14 ` [PATCH v2 6/8] PCI/TSM: Add pci_tsm_bind() helper for instantiating TDIs Dan Williams
2025-11-13 12:01   ` Jonathan Cameron
2025-11-13 20:41     ` dan.j.williams
2025-11-17 11:30   ` Xu Yilun
2025-11-13  2:14 ` [PATCH v2 7/8] PCI/TSM: Add pci_tsm_guest_req() for managing TDIs Dan Williams
2025-11-13 12:04   ` Jonathan Cameron
2025-11-17 11:57   ` Xu Yilun
2025-11-13  2:14 ` [PATCH v2 8/8] PCI/TSM: Add 'dsm' and 'bound' attributes for dependent functions Dan Williams
2025-11-17 14:58   ` Xu Yilun

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