[PATCH 0/1] Add ExynosAutov920 hsi0 support to exynos-sysreg

[Sanghoon Bae <sh86.bae@samsung.com>]

The ExynosAutov920 SoC includes a PCIe IP and a hsi0 register block that
is mapped in the exynos-sysreg.

To manage PCIe PHY power, configure the PCIe PLL, and set the device direction,
the hsi0 registers need to be defined in exynos-sysreg.

This patch must be applied before the ExynosAutov920 PCIe PHY is enabled.

Sanghoon Bae (1):
  dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920

 .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml   | 1 +
 1 file changed, 1 insertion(+)

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2.45.2