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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:satlexmb07.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2025 08:24:35.1518 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71046995-089c-4b0c-3f74-08de267be83e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6090 Received-SPF: permerror client-ip=2a01:111:f403:c10c::1; envelope-from=Sairaj.ArunKodilkar@amd.com; helo=SA9PR02CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This makes it easier to add new MMIO registers for tracing and removes the unnecessary complexity introduced by amdvi_mmio_(low/high) array. Signed-off-by: Sairaj Kodilkar --- hw/i386/amd_iommu.c | 76 +++++++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 37 deletions(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index d689a06eca46..a9ee7150ef17 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -35,28 +35,13 @@ #include "kvm/kvm_i386.h" #include "qemu/iova-tree.h" -/* used AMD-Vi MMIO registers */ -const char *amdvi_mmio_low[] = { - "AMDVI_MMIO_DEVTAB_BASE", - "AMDVI_MMIO_CMDBUF_BASE", - "AMDVI_MMIO_EVTLOG_BASE", - "AMDVI_MMIO_CONTROL", - "AMDVI_MMIO_EXCL_BASE", - "AMDVI_MMIO_EXCL_LIMIT", - "AMDVI_MMIO_EXT_FEATURES", - "AMDVI_MMIO_PPR_BASE", - "UNHANDLED" -}; -const char *amdvi_mmio_high[] = { - "AMDVI_MMIO_COMMAND_HEAD", - "AMDVI_MMIO_COMMAND_TAIL", - "AMDVI_MMIO_EVTLOG_HEAD", - "AMDVI_MMIO_EVTLOG_TAIL", - "AMDVI_MMIO_STATUS", - "AMDVI_MMIO_PPR_HEAD", - "AMDVI_MMIO_PPR_TAIL", - "UNHANDLED" -}; +#define MMIO_REG_TO_STRING(mmio_reg, name) {\ + case mmio_reg: \ + name = #mmio_reg; \ + break; \ +} + +#define MMIO_NAME_SIZE 50 struct AMDVIAddressSpace { PCIBus *bus; /* PCIBus (for bus number) */ @@ -1484,31 +1469,48 @@ static void amdvi_cmdbuf_run(AMDVIState *s) } } -static inline uint8_t amdvi_mmio_get_index(hwaddr addr) -{ - uint8_t index = (addr & ~0x2000) / 8; - - if ((addr & 0x2000)) { - /* high table */ - index = index >= AMDVI_MMIO_REGS_HIGH ? AMDVI_MMIO_REGS_HIGH : index; - } else { - index = index >= AMDVI_MMIO_REGS_LOW ? AMDVI_MMIO_REGS_LOW : index; +static inline void amdvi_mmio_get_name(hwaddr addr, + char mmio_name[MMIO_NAME_SIZE]) +{ + const char *name = NULL; + + switch (addr) { + MMIO_REG_TO_STRING(AMDVI_MMIO_DEVICE_TABLE, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_BASE, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_BASE, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_CONTROL, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EXCL_BASE, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EXCL_LIMIT, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EXT_FEATURES, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_HEAD, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_TAIL, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_HEAD, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_TAIL, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_STATUS, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_BASE, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_HEAD, name) + MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_TAIL, name) + default: + name = "UNHANDLED"; } - return index; + strncpy(mmio_name, name, MMIO_NAME_SIZE); } static void amdvi_mmio_trace_read(hwaddr addr, unsigned size) { - uint8_t index = amdvi_mmio_get_index(addr); - trace_amdvi_mmio_read(amdvi_mmio_low[index], addr, size, addr & ~0x07); + char mmio_name[MMIO_NAME_SIZE]; + + amdvi_mmio_get_name(addr, mmio_name); + trace_amdvi_mmio_read(mmio_name, addr, size, addr & ~0x07); } static void amdvi_mmio_trace_write(hwaddr addr, unsigned size, uint64_t val) { - uint8_t index = amdvi_mmio_get_index(addr); - trace_amdvi_mmio_write(amdvi_mmio_low[index], addr, size, val, - addr & ~0x07); + char mmio_name[MMIO_NAME_SIZE]; + + amdvi_mmio_get_name(addr, mmio_name); + trace_amdvi_mmio_write(mmio_name, addr, size, val, addr & ~0x07); } static uint64_t amdvi_mmio_read(void *opaque, hwaddr addr, unsigned size) -- 2.34.1