Re: [PATCH 1/1] iommu/vt-d: Restore previous domain::aperture_end calculation

[Jason Gunthorpe <jgg@nvidia.com>]

On Thu, Nov 20, 2025 at 03:25:24PM +0800, Lu Baolu wrote:
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2817,6 +2817,16 @@ intel_iommu_domain_alloc_first_stage(struct device *dev,
>  		cfg.common.hw_max_vasz_lg2 = 57;
>  	else
>  		cfg.common.hw_max_vasz_lg2 = 48;
> +
> +	/*
> +	 * Spec 3.6 First-Stage Translation:
> +	 *
> +	 * Software must limit addresses to less than the minimum of MGAW
> +	 * and the lower canonical address width implied by FSPM (i.e.,
> +	 * 47-bit when FSPM is 4-level and 56-bit when FSPM is 5-level).
> +	 */
> +	cfg.common.hw_max_vasz_lg2 = min(cap_mgaw(iommu->cap),
> +					 cfg.common.hw_max_vasz_lg2);
>  	cfg.common.hw_max_oasz_lg2 = 52;
>  	cfg.common.features = BIT(PT_FEAT_SIGN_EXTEND) |
>  			      BIT(PT_FEAT_FLUSH_RANGE);

This is missing the hunk for paging_domain_compatible_first_stage(), I
think that is important!

Jason