From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oupton@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Fuad Tabba <tabba@google.com>, Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 40/49] KVM: arm64: selftests: gic_v3: Add irq group setting helper
Date: Thu, 20 Nov 2025 17:25:30 +0000 [thread overview]
Message-ID: <20251120172540.2267180-41-maz@kernel.org> (raw)
In-Reply-To: <20251120172540.2267180-1-maz@kernel.org>
Being able to set the group of an interrupt is pretty useful.
Add such a helper.
Tested-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
tools/testing/selftests/kvm/include/arm64/gic.h | 1 +
tools/testing/selftests/kvm/lib/arm64/gic.c | 6 ++++++
.../testing/selftests/kvm/lib/arm64/gic_private.h | 1 +
tools/testing/selftests/kvm/lib/arm64/gic_v3.c | 15 +++++++++++++++
4 files changed, 23 insertions(+)
diff --git a/tools/testing/selftests/kvm/include/arm64/gic.h b/tools/testing/selftests/kvm/include/arm64/gic.h
index baeb3c859389d..cc7a7f34ed377 100644
--- a/tools/testing/selftests/kvm/include/arm64/gic.h
+++ b/tools/testing/selftests/kvm/include/arm64/gic.h
@@ -57,6 +57,7 @@ void gic_irq_set_pending(unsigned int intid);
void gic_irq_clear_pending(unsigned int intid);
bool gic_irq_get_pending(unsigned int intid);
void gic_irq_set_config(unsigned int intid, bool is_edge);
+void gic_irq_set_group(unsigned int intid, bool group);
void gic_rdist_enable_lpis(vm_paddr_t cfg_table, size_t cfg_table_size,
vm_paddr_t pend_table);
diff --git a/tools/testing/selftests/kvm/lib/arm64/gic.c b/tools/testing/selftests/kvm/lib/arm64/gic.c
index 7abbf8866512a..b023868fe0b82 100644
--- a/tools/testing/selftests/kvm/lib/arm64/gic.c
+++ b/tools/testing/selftests/kvm/lib/arm64/gic.c
@@ -155,3 +155,9 @@ void gic_irq_set_config(unsigned int intid, bool is_edge)
GUEST_ASSERT(gic_common_ops);
gic_common_ops->gic_irq_set_config(intid, is_edge);
}
+
+void gic_irq_set_group(unsigned int intid, bool group)
+{
+ GUEST_ASSERT(gic_common_ops);
+ gic_common_ops->gic_irq_set_group(intid, group);
+}
diff --git a/tools/testing/selftests/kvm/lib/arm64/gic_private.h b/tools/testing/selftests/kvm/lib/arm64/gic_private.h
index d24e9ecc96c6d..b6a7e30c3eb1f 100644
--- a/tools/testing/selftests/kvm/lib/arm64/gic_private.h
+++ b/tools/testing/selftests/kvm/lib/arm64/gic_private.h
@@ -25,6 +25,7 @@ struct gic_common_ops {
void (*gic_irq_clear_pending)(uint32_t intid);
bool (*gic_irq_get_pending)(uint32_t intid);
void (*gic_irq_set_config)(uint32_t intid, bool is_edge);
+ void (*gic_irq_set_group)(uint32_t intid, bool group);
};
extern const struct gic_common_ops gicv3_ops;
diff --git a/tools/testing/selftests/kvm/lib/arm64/gic_v3.c b/tools/testing/selftests/kvm/lib/arm64/gic_v3.c
index 66d05506f78b1..3e4e1a6a4f7c3 100644
--- a/tools/testing/selftests/kvm/lib/arm64/gic_v3.c
+++ b/tools/testing/selftests/kvm/lib/arm64/gic_v3.c
@@ -293,6 +293,20 @@ static void gicv3_enable_redist(volatile void *redist_base)
}
}
+static void gicv3_set_group(uint32_t intid, bool grp)
+{
+ uint32_t cpu_or_dist;
+ uint32_t val;
+
+ cpu_or_dist = (get_intid_range(intid) == SPI_RANGE) ? DIST_BIT : guest_get_vcpuid();
+ val = gicv3_reg_readl(cpu_or_dist, GICD_IGROUPR + (intid / 32) * 4);
+ if (grp)
+ val |= BIT(intid % 32);
+ else
+ val &= ~BIT(intid % 32);
+ gicv3_reg_writel(cpu_or_dist, GICD_IGROUPR + (intid / 32) * 4, val);
+}
+
static void gicv3_cpu_init(unsigned int cpu)
{
volatile void *sgi_base;
@@ -400,6 +414,7 @@ const struct gic_common_ops gicv3_ops = {
.gic_irq_clear_pending = gicv3_irq_clear_pending,
.gic_irq_get_pending = gicv3_irq_get_pending,
.gic_irq_set_config = gicv3_irq_set_config,
+ .gic_irq_set_group = gicv3_set_group,
};
void gic_rdist_enable_lpis(vm_paddr_t cfg_table, size_t cfg_table_size,
--
2.47.3
next prev parent reply other threads:[~2025-11-20 17:26 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 17:24 [PATCH v4 00/49] KVM: arm64: Add LR overflow infrastructure (the final one, I swear!) Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 01/49] irqchip/gic: Add missing GICH_HCR control bits Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 02/49] irqchip/gic: Expose CPU interface VA to KVM Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 03/49] irqchip/apple-aic: Spit out ICH_MISR_EL2 value on spurious vGIC MI Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 04/49] KVM: arm64: Turn vgic-v3 errata traps into a patched-in constant Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 05/49] KVM: arm64: vgic-v3: Fix GICv3 trapping in protected mode Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 06/49] KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping Marc Zyngier
2025-11-25 11:26 ` Suzuki K Poulose
2025-11-25 13:48 ` Marc Zyngier
2025-11-25 14:14 ` Suzuki K Poulose
2025-11-25 15:01 ` Marc Zyngier
2025-11-25 15:03 ` Suzuki K Poulose
2025-11-20 17:24 ` [PATCH v4 07/49] KVM: arm64: Repack struct vgic_irq fields Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 08/49] KVM: arm64: Add tracking of vgic_irq being present in a LR Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 09/49] KVM: arm64: Add LR overflow handling documentation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 10/49] KVM: arm64: GICv3: Drop LPI active state when folding LRs Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 11/49] KVM: arm64: GICv3: Preserve EOIcount on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 12/49] KVM: arm64: GICv3: Decouple ICH_HCR_EL2 programming from LRs Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 13/49] KVM: arm64: GICv3: Extract LR folding primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 14/49] KVM: arm64: GICv3: Extract LR computing primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 15/49] KVM: arm64: GICv2: Preserve EOIcount on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 16/49] KVM: arm64: GICv2: Decouple GICH_HCR programming from LRs being loaded Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 17/49] KVM: arm64: GICv2: Extract LR folding primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 18/49] KVM: arm64: GICv2: Extract LR computing primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 19/49] KVM: arm64: Compute vgic state irrespective of the number of interrupts Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 20/49] KVM: arm64: Eagerly save VMCR on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 21/49] KVM: arm64: Revamp vgic maintenance interrupt configuration Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 22/49] KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset() Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 23/49] KVM: arm64: Make vgic_target_oracle() globally available Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 24/49] KVM: arm64: Invert ap_list sorting to push active interrupts out Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 25/49] KVM: arm64: Move undeliverable interrupts to the end of ap_list Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 26/49] KVM: arm64: Use MI to detect groups being enabled/disabled Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 27/49] KVM: arm64: GICv3: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 28/49] KVM: arm64: GICv3: Handle deactivation via ICV_DIR_EL1 traps Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 29/49] KVM: arm64: GICv3: Add GICv2 SGI handling to deactivation primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 30/49] KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 31/49] KVM: arm64: GICv3: Add SPI tracking to handle asymmetric deactivation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 32/49] KVM: arm64: GICv3: Handle in-LR deactivation when possible Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 33/49] KVM: arm64: GICv3: Avoid broadcast kick on CPUs lacking TDIR Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 34/49] KVM: arm64: GICv3: nv: Resync LRs/VMCR/HCR early for better MI emulation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 35/49] KVM: arm64: GICv3: nv: Plug L1 LR sync into deactivation primitive Marc Zyngier
2026-03-30 11:51 ` Vishnu Pajjuri
2026-03-30 12:17 ` Marc Zyngier
2026-03-31 6:31 ` Vishnu Pajjuri
2026-03-31 9:42 ` Marc Zyngier
2026-04-22 6:55 ` Marc Zyngier
2026-04-22 14:57 ` Vishnu Pajjuri
2026-04-26 9:14 ` Marc Zyngier
2026-04-26 14:07 ` Marc Zyngier
2026-04-28 20:37 ` Marc Zyngier
2026-04-24 0:02 ` Darren Hart
2025-11-20 17:25 ` [PATCH v4 36/49] KVM: arm64: GICv3: Force exit to sync ICH_HCR_EL2.En Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 37/49] KVM: arm64: GICv2: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 38/49] KVM: arm64: GICv2: Handle deactivation via GICV_DIR traps Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 39/49] KVM: arm64: GICv2: Always trap GICV_DIR register Marc Zyngier
2025-11-20 17:25 ` Marc Zyngier [this message]
2025-11-20 17:25 ` [PATCH v4 41/49] KVM: arm64: selftests: gic_v3: Disable Group-0 interrupts by default Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 42/49] KVM: arm64: selftests: vgic_irq: Fix GUEST_ASSERT_IAR_EMPTY() helper Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 43/49] KVM: arm64: selftests: vgic_irq: Change configuration before enabling interrupt Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 44/49] KVM: arm64: selftests: vgic_irq: Exclude timer-controlled interrupts Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 45/49] KVM: arm64: selftests: vgic_irq: Remove LR-bound limitation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 46/49] KVM: arm64: selftests: vgic_irq: Perform EOImode==1 deactivation in ack order Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 47/49] KVM: arm64: selftests: vgic_irq: Add asymmetric SPI deaectivation test Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 48/49] KVM: arm64: selftests: vgic_irq: Add Group-0 enable test Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 49/49] KVM: arm64: selftests: vgic_irq: Add timer deactivation test Marc Zyngier
2025-11-21 14:15 ` [PATCH v4 00/49] KVM: arm64: Add LR overflow infrastructure (the final one, I swear!) Mark Brown
2025-11-24 22:44 ` Oliver Upton
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