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From: Devendra K Verma <devendra.verma@amd.com>
To: <bhelgaas@google.com>, <mani@kernel.org>, <vkoul@kernel.org>
Cc: <dmaengine@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <michal.simek@amd.com>,
	<Devendra.Verma@amd.com>
Subject: [PATCH RESEND v6 0/2] Add AMD MDB Endpoint and non-LL mode Support
Date: Fri, 21 Nov 2025 17:04:53 +0530	[thread overview]
Message-ID: <20251121113455.4029-1-devendra.verma@amd.com> (raw)

This series of patch support the following:

 - AMD MDB Endpoint Support, as part of this patch following are
   added:
   o AMD supported device ID and vendor ID (Xilinx)
   o AMD MDB specific driver data
   o AMD specific VSEC capabilities to retrieve the base of
     phys address of MDB side DDR
   o Logic to assign the offsets to LL and data blocks if
     more number of channels are enabled than configured
     in the given pci_data struct.

 - Addition of non-LL mode
   o The IP supported non-LL mode functions
   o Flexibility to choose non-LL mode via dma_slave_config
     param peripheral_config, by the client for all the vendors
     using HDMA IP.
   o Allow IP utilization if LL mode is not available

Devendra K Verma (2):
  dmaengine: dw-edma: Add AMD MDB Endpoint Support
  dmaengine: dw-edma: Add non-LL mode

 drivers/dma/dw-edma/dw-edma-core.c    |  41 ++++++++-
 drivers/dma/dw-edma/dw-edma-core.h    |   1 +
 drivers/dma/dw-edma/dw-edma-pcie.c    | 169 ++++++++++++++++++++++++++++++++--
 drivers/dma/dw-edma/dw-hdma-v0-core.c |  61 +++++++++++-
 drivers/dma/dw-edma/dw-hdma-v0-regs.h |   1 +
 include/linux/dma/edma.h              |   1 +
 6 files changed, 260 insertions(+), 14 deletions(-)

-- 
1.8.3.1


             reply	other threads:[~2025-11-21 11:35 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-21 11:34 Devendra K Verma [this message]
2025-11-21 11:34 ` [PATCH RESEND v6 1/2] dmaengine: dw-edma: Add AMD MDB Endpoint Support Devendra K Verma
2025-12-01  9:58   ` Verma, Devendra
2025-12-08  5:24   ` Manivannan Sadhasivam
2025-12-10 11:40     ` Verma, Devendra
2025-12-10 13:26       ` Manivannan Sadhasivam
2025-12-10 16:32         ` Bjorn Helgaas
2025-12-11 11:40           ` Verma, Devendra
2025-12-12  0:54           ` Manivannan Sadhasivam
2025-11-21 11:34 ` [PATCH RESEND v6 2/2] dmaengine: dw-edma: Add non-LL mode Devendra K Verma
2025-12-01  9:58   ` Verma, Devendra
2025-12-03  9:24     ` Eugen Hristev
2025-12-10  9:54       ` Verma, Devendra
2025-12-08  5:29   ` Manivannan Sadhasivam
2025-12-10 11:39     ` Verma, Devendra
2025-12-10 13:28       ` Manivannan Sadhasivam
2025-12-11 11:39         ` Verma, Devendra
2025-12-12  0:51           ` Manivannan Sadhasivam
  -- strict thread matches above, loose matches on Subject: below --
2025-11-11  7:05 [PATCH RESEND v6 0/2] Add AMD MDB Endpoint and non-LL mode Support Devendra K Verma

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