From: Peter Zijlstra <peterz@infradead.org>
To: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com
Subject: Re: [DISCUSSION] x86: In-Kernel Use of Extended General-Purpose Registers
Date: Wed, 26 Nov 2025 17:30:47 +0100 [thread overview]
Message-ID: <20251126163047.GA3666665@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20251124213227.123779-1-chang.seok.bae@intel.com>
On Mon, Nov 24, 2025 at 09:32:23PM +0000, Chang S. Bae wrote:
> This follows how vector registers are used today in places like crypto
> routines. AVX state usage is bracketed by kernel_fpu_begin() /
> kernel_fpu_end(). EGPRs could be similarly used in a small bounded
> region.
>
> Under this model:
>
> * No changes are needed to the existing XSTATE management API.
>
> * Preemption and softirqs would be disabled while EGPRs are live,
> subsequently limiting usage to small regions.
>
> * This lends itself mostly to hand-written assembly, which is less
> scalable for broader adoption.
IIRC it isn't hard to make kernel_fpu_begin/end() preemptible. It came
up with the last xsave rework -- mostly in the context of -rt, but
nobody ever picked it up and did it.
next prev parent reply other threads:[~2025-11-26 16:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-24 21:32 [DISCUSSION] x86: In-Kernel Use of Extended General-Purpose Registers Chang S. Bae
2025-11-24 21:32 ` [RFC PATCH 1/3] x86/lib: Refactor csum_partial_copy_generic() into a macro Chang S. Bae
2025-11-24 21:32 ` [RFC PATCH 2/3] x86/lib: Convert repeated asm sequences in checksum copy into macros Chang S. Bae
2025-11-24 21:32 ` [RFC PATCH 3/3] x86/lib: Use EGPRs in 64-bit checksum copy loop Chang S. Bae
2025-11-25 10:37 ` david laight
2025-12-01 21:39 ` Chang S. Bae
2025-11-26 16:30 ` Peter Zijlstra [this message]
2025-12-01 21:40 ` [DISCUSSION] x86: In-Kernel Use of Extended General-Purpose Registers Chang S. Bae
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