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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 0/2] spi: microchip-core: Code improvements (part 2)
Date: Fri, 28 Nov 2025 19:52:38 +0100	[thread overview]
Message-ID: <20251128185518.3989250-1-andriy.shevchenko@linux.intel.com> (raw)

Here is the second part of the set of refactoring and cleaning it up.

Changelog v4:
- collected tags (Prajna)
- dropped applied patches
- added a new patch 2

v3: <20251127190031.2998705-1-andriy.shevchenko@linux.intel.com>

Changelog v3:
- collected tags (Prajna)
- restored dummy read in TX-only transfers

v2: <20251126075558.2035012-1-andriy.shevchenko@linux.intel.com>

Changelog v2:
- dropped device property agnostic API conversion change (Mark)

Andy Shevchenko (2):
  spi: microchip-core: Refactor FIFO read and write handlers
  spi: microchip-core: use XOR instead of ANDNOT to simplify the logic

 drivers/spi/spi-microchip-core-spi.c | 33 +++++++++++-----------------
 1 file changed, 13 insertions(+), 20 deletions(-)

-- 
2.50.1


             reply	other threads:[~2025-11-28 18:55 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-28 18:52 Andy Shevchenko [this message]
2025-11-28 18:52 ` [PATCH v4 1/2] spi: microchip-core: Refactor FIFO read and write handlers Andy Shevchenko
2025-11-28 18:52 ` [PATCH v4 2/2] spi: microchip-core: use XOR instead of ANDNOT to simplify the logic Andy Shevchenko
2025-11-28 19:30   ` Jonas Gorski
2025-11-29  8:19     ` Andy Shevchenko
2025-12-01 16:08       ` Conor Dooley
2025-12-01 17:57         ` Andy Shevchenko
2026-01-08 13:00           ` Prajna Rajendra Kumar
2026-01-08 17:53             ` Andy Shevchenko

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