From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
pekka.paalanen@collabora.com, contact@emersion.fr,
harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
sebastian.wick@redhat.com, swati2.sharma@intel.com,
alex.hung@amd.com, jani.nikula@intel.com,
suraj.kandpal@intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: [v8 01/15] drm/i915/display: Add identifiers for driver specific blocks
Date: Wed, 3 Dec 2025 14:21:57 +0530 [thread overview]
Message-ID: <20251203085211.3663374-2-uma.shankar@intel.com> (raw)
In-Reply-To: <20251203085211.3663374-1-uma.shankar@intel.com>
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add macros to identify intel specific color blocks. It will help
in mapping drm_color_ops to intel color HW blocks
v2:- Prefix enums with INTEL_* (Jani, Suraj)
- Remove unnecessary comments (Jani)
- Commit message improvements (Suraj)
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_limits.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index f0fa27e365ab..55fd574ba313 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -138,4 +138,12 @@ enum hpd_pin {
HPD_NUM_PINS
};
+enum intel_color_block {
+ INTEL_PLANE_CB_PRE_CSC_LUT,
+ INTEL_PLANE_CB_CSC,
+ INTEL_PLANE_CB_POST_CSC_LUT,
+
+ INTEL_CB_MAX
+};
+
#endif /* __INTEL_DISPLAY_LIMITS_H__ */
--
2.50.1
next prev parent reply other threads:[~2025-12-03 8:40 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-03 8:51 [v8 00/15] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-12-03 8:47 ` ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms (rev7) Patchwork
2025-12-03 8:48 ` ✓ CI.KUnit: success " Patchwork
2025-12-03 8:51 ` Uma Shankar [this message]
2025-12-03 8:51 ` [v8 02/15] drm/i915: Add intel_color_op Uma Shankar
2025-12-03 8:51 ` [v8 03/15] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-12-03 8:52 ` [v8 04/15] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-12-03 8:52 ` [v8 05/15] drm/i915/color: Add framework to program CSC Uma Shankar
2025-12-03 8:52 ` [v8 06/15] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-12-03 8:52 ` [v8 07/15] drm/i915/color: Add plane CTM callback for D12 and beyond Uma Shankar
2025-12-03 8:52 ` [v8 08/15] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-12-03 8:52 ` [v8 09/15] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-12-03 8:52 ` [v8 10/15] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-12-03 8:52 ` [v8 11/15] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-12-03 8:52 ` [v8 12/15] drm/i915/color: Program Plane Post CSC Registers Uma Shankar
2025-12-03 8:52 ` [v8 13/15] drm/i915/color: Add registers for 3D LUT Uma Shankar
2025-12-03 8:52 ` [v8 14/15] drm/i915/color: Add 3D LUT to color pipeline Uma Shankar
2025-12-12 15:08 ` Ville Syrjälä
2025-12-12 17:46 ` Borah, Chaitanya Kumar
2025-12-12 18:25 ` Simon Ser
2025-12-15 8:43 ` Borah, Chaitanya Kumar
2025-12-18 16:15 ` Simon Ser
2025-12-19 13:24 ` Borah, Chaitanya Kumar
2025-12-12 18:45 ` Ville Syrjälä
2025-12-15 8:26 ` Borah, Chaitanya Kumar
2025-12-03 8:52 ` [v8 15/15] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-12-03 9:29 ` ✗ i915.CI.BAT: failure for Plane Color Pipeline support for Intel platforms (rev8) Patchwork
2025-12-04 5:10 ` ✓ i915.CI.BAT: success " Patchwork
2025-12-04 18:44 ` [v8 00/15] Plane Color Pipeline support for Intel platforms Jani Nikula
2025-12-11 0:08 ` Matt Roper
2025-12-11 14:01 ` Borah, Chaitanya Kumar
2025-12-05 2:50 ` ✗ i915.CI.Full: failure for Plane Color Pipeline support for Intel platforms (rev8) Patchwork
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