From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8444B3557F5; Wed, 3 Dec 2025 16:57:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764781036; cv=none; b=asr7H3DcD0hpBL5SsDtdvHeNjAV/taSgaaDkqpN5HGtuyT81oWNGRxuQUXUK/m/yJlPwBH5bKOtMgpabVuhveC68vBpdwMqrOR/XkyxqdqALPMgbMIos3bKH2cQsXRRFCeFCL4DEkPinEgyvVEPfeLF+yioBMMxGF4OOthfAnw0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764781036; c=relaxed/simple; bh=9eg8OXx5k/eNTU2hf74JMDzBntQGgRsqAs1d/4IDNhg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WdZy6jIj1s/mG60W2vbwio8aKszwnRkR4ScYpcoQw5aGHsWdHmgGVH7Z7bHeRmr+brUE9NXyYBiaSUOa7FlM5drVFw5vXesmAD10lDbEG/jUkuADYE3RnQL9kZBDF6ozePIbelEKC9HnpRTZcVyLXIz/Cd6IiaD7RjLrIEJ69dE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=sN38wBhR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="sN38wBhR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 07A93C4CEF5; Wed, 3 Dec 2025 16:57:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1764781036; bh=9eg8OXx5k/eNTU2hf74JMDzBntQGgRsqAs1d/4IDNhg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sN38wBhRnQbC7AQkU4vWxGRmoxW/iuOpQ0ekBfad3Hc1e1zDlxz9N5GlAXjaYlyVN nb2ueu6qN9pGXsyRk1xbaAqbVUX47/y21xfK0plthiNXVYP26fzwAwVkFOKgggIOgH LrXgxSqRsGwAC0uJJ3GRUuQFA3nueLSYJzq6SrPI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Miquel Raynal , Tudor Ambarus , Mark Brown , Sasha Levin Subject: [PATCH 6.6 30/93] spi: spi-mem: Add a new controller capability Date: Wed, 3 Dec 2025 16:29:23 +0100 Message-ID: <20251203152337.630454626@linuxfoundation.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251203152336.494201426@linuxfoundation.org> References: <20251203152336.494201426@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Miquel Raynal [ Upstream commit 1248c9b8d54120950fda10fbeb98fb8932b4d45c ] There are spi devices with multiple frequency limitations depending on the invoked command. We probably do not want to afford running at the lowest supported frequency all the time, so if we want to get the most of our hardware, we need to allow per-operation frequency limitations. Among all the SPI memory controllers, I believe all are capable of changing the spi frequency on the fly. Some of the drivers do not make any frequency setup though. And some others will derive a per chip prescaler value which will be used forever. Actually changing the frequency on the fly is something new in Linux, so we need to carefully flag the drivers which do and do not support it. A controller capability is created for that, and the presence for this capability will always be checked before accepting such pattern. Signed-off-by: Miquel Raynal Reviewed-by: Tudor Ambarus Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-2-ad218dbc406f@bootlin.com Signed-off-by: Mark Brown Stable-dep-of: 40ad64ac25bb ("spi: nxp-fspi: Propagate fwnode in ACPI case as well") Signed-off-by: Sasha Levin --- drivers/spi/spi-mem.c | 6 ++++++ include/linux/spi/spi-mem.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index b73a659e268d6..c581aa5fbf7cf 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -191,6 +191,12 @@ bool spi_mem_default_supports_op(struct spi_mem *mem, op->max_freq < mem->spi->controller->min_speed_hz) return false; + if (op->max_freq && + op->max_freq < mem->spi->max_speed_hz) { + if (!spi_mem_controller_is_capable(ctlr, per_op_freq)) + return false; + } + return spi_mem_check_buswidth(mem, op); } EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index cceebf8c78ba9..6bd0b548bd1e9 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -309,11 +309,13 @@ struct spi_controller_mem_ops { * @ecc: Supports operations with error correction * @swap16: Supports swapping bytes on a 16 bit boundary when configured in * Octal DTR + * @per_op_freq: Supports per operation frequency switching */ struct spi_controller_mem_caps { bool dtr; bool ecc; bool swap16; + bool per_op_freq; }; #define spi_mem_controller_is_capable(ctlr, cap) \ -- 2.51.0