Re: [PATCH v6 2/2] coresight: cti: Add Qualcomm extended CTI support

[Leo Yan <leo.yan@arm.com>]

On Tue, Dec 09, 2025 at 08:51:38PM +0800, Yingchao Deng (Consultant) wrote:

[...]

> >    void cti_write_single_reg(struct cti_drvdata *drvdata,
> >                              int offset, u32 value)
> >    {
> >            CS_UNLOCK(drvdata->base);
> >            writel_relaxed(value, cti_reg_addr(drvdata, offset));
> >            CS_LOCK(drvdata->base);
> >    }
> 
> However, since we also need to handle cti_reg_addr_with_nr, it will be
> necessary to add an additional parameter "nr" to cti_write_single_reg?

I expect the argument "offset" has already containted the nr in
bits[31..28], so don't need to pass "nr" parameter to
cti_write_single_reg().

You will change inen_store() / outen_store(), e.g.,:

    cti_write_single_reg(drvdata, CTI_REG_SET_NR(CTIINEN, index),
                         value);

Just remind, this might be a separate refactor for common code and you
need to write a patch for this, then is followed by QCOM CTI support
patch.

Thanks,
Leo