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Tsirkin" , Marcel Apfelbaum , qemu-devel@nongnu.org, qemu-stable@nongnu.org Subject: Re: [PATCH] q35: Fix migration of SMRAM state Message-ID: <20251210144055.3351d435@imammedo> In-Reply-To: <20251203180851.6390-1-arbn@yandex-team.com> References: <20251203180851.6390-1-arbn@yandex-team.com> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.51; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, 3 Dec 2025 19:08:51 +0100 Andrey Ryabinin wrote: > mch_update_smbase_smram() essentially uses wmask[MCH_HOST_BRIDGE_F_SMBASE] > to track SMBASE area state. Since 'wmask' state is not migrated is not > migrated, the destination QEMU always sees > wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D=3D 0xff >=20 > As a result, when mch_update() calls mch_update_smbase_smram() on the > destination, it resets ->config[MCH_HOST_BRIDGE_F_SMBASE] and disables > the smbase-window memory region=E2=80=94even if it was enabled on the sou= rce. [...] > +static void mch_smbase_smram_post_load(MCHPCIState *mch) > +{ > + PCIDevice *pd =3D PCI_DEVICE(mch); > + uint8_t *reg =3D pd->config + MCH_HOST_BRIDGE_F_SMBASE; > + > + if (!mch->has_smram_at_smbase) { > + return; > + } > + > + if (*reg =3D=3D MCH_HOST_BRIDGE_F_SMBASE_IN_RAM) { > + pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D > + MCH_HOST_BRIDGE_F_SMBASE_LCK; > + } else if (*reg =3D=3D MCH_HOST_BRIDGE_F_SMBASE_LCK) { > + pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D 0; > + } > +} You are correctly pointing to the issue about non-migratable wmask controll= ing config[], it should be other way around. given reset already sets wmask[MCH_HOST_BRIDGE_F_SMBASE] && config[MCH_HOST_BRIDGE_F_SMBASE] to default values, we don't need to do the same in mch_update_smbase_smram() so we can just drop it. Also I wouldn't introduce a dedicated mch_smbase_smram_post_load() though, since mch_post_load() already calls mch_update_smbase_smram() indirectly, I'd rather fix the later. Would following work for you: diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index a708758d36..7a85a349bd 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -431,31 +431,25 @@ static void mch_update_smbase_smram(MCHPCIState *mch) return; } =20 - if (*reg =3D=3D MCH_HOST_BRIDGE_F_SMBASE_QUERY) { - pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D - MCH_HOST_BRIDGE_F_SMBASE_LCK; - *reg =3D MCH_HOST_BRIDGE_F_SMBASE_IN_RAM; - return; - } - /* - * default/reset state, discard written value - * which will disable SMRAM balackhole at SMBASE + * reg value can come either from register write/reset/migration + * source, update wmask to be in sync with it regardless of source */ - if (pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D=3D 0xff) { - *reg =3D 0x00; + switch (*reg) { + case MCH_HOST_BRIDGE_F_SMBASE_QUERY: + pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D MCH_HOST_BRIDGE_F_SMBASE_L= CK; + *reg =3D MCH_HOST_BRIDGE_F_SMBASE_IN_RAM; + return; + case MCH_HOST_BRIDGE_F_SMBASE_LCK: + pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D 0; + break; + case MCH_HOST_BRIDGE_F_SMBASE_IN_RAM: + pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] =3D MCH_HOST_BRIDGE_F_SMBASE_L= CK; + break; } =20 memory_region_transaction_begin(); - if (*reg & MCH_HOST_BRIDGE_F_SMBASE_LCK) { - /* disable all writes */ - pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] &=3D - ~MCH_HOST_BRIDGE_F_SMBASE_LCK; - *reg =3D MCH_HOST_BRIDGE_F_SMBASE_LCK; - lck =3D true; - } else { - lck =3D false; - } + lck =3D *reg & MCH_HOST_BRIDGE_F_SMBASE_LCK; memory_region_set_enabled(&mch->smbase_blackhole, lck); memory_region_set_enabled(&mch->smbase_window, lck); memory_region_transaction_commit(); > static int mch_post_load(void *opaque, int version_id) > { > MCHPCIState *mch =3D opaque; > + > + mch_smbase_smram_post_load(mch); > mch_update(mch); > return 0; > }