From: Brian Sune <briansune@gmail.com>
To: Chee Tien Fong <tienfong.chee@altera.com>,
Tom Rini <trini@konsulko.com>,
u-boot@lists.denx.de
Subject: [PATCH v1 1/3] sync sdram ecc support to mainstream
Date: Tue, 16 Dec 2025 04:27:10 +0800 [thread overview]
Message-ID: <20251215202712.175-1-briansune@gmail.com> (raw)
It is been a while that the DDR ECC is missing.
Pull from Altera trunk and sync to mainstream.
Signed-off-by: Brian Sune <briansune@gmail.com>
---
drivers/ddr/altera/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile
index 7ed43965be5..b9e3302d714 100644
--- a/drivers/ddr/altera/Makefile
+++ b/drivers/ddr/altera/Makefile
@@ -7,8 +7,8 @@
# Copyright (C) 2014-2025 Altera Corporation <www.altera.com>
ifdef CONFIG_$(PHASE_)ALTERA_SDRAM
-obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o
-obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o
+obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_soc32.o sdram_gen5.o sequencer.o
+obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_soc32.o sdram_arria10.o
obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_soc64.o sdram_s10.o
obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += sdram_soc64.o sdram_agilex.o
obj-$(CONFIG_TARGET_SOCFPGA_N5X) += sdram_soc64.o sdram_n5x.o
--
2.34.1
next reply other threads:[~2025-12-15 20:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-15 20:27 Brian Sune [this message]
2025-12-15 20:27 ` [PATCH v1 2/3] sync sdram ecc support to mainstream Brian Sune
2026-01-27 7:45 ` Chee, Tien Fong
2025-12-15 20:27 ` [PATCH v1 3/3] " Brian Sune
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