From: Jason Gunthorpe <jgg@nvidia.com>
To: Mostafa Saleh <smostafa@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>,
will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, skolothumtho@nvidia.com,
praan@google.com, xueshuai@linux.alibaba.com
Subject: Re: [PATCH rc v3 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence
Date: Mon, 15 Dec 2025 20:09:52 -0400 [thread overview]
Message-ID: <20251216000952.GA6079@nvidia.com> (raw)
In-Reply-To: <aT87A1ur4htPjM5T@google.com>
On Sun, Dec 14, 2025 at 10:32:35PM +0000, Mostafa Saleh wrote:
> > * Figure out if we can do a hitless update of entry to become target. Returns a
> > * bit mask where 1 indicates that qword needs to be set disruptively.
> > @@ -1094,13 +1100,22 @@ static u8 arm_smmu_entry_qword_diff(struct arm_smmu_entry_writer *writer,
> > {
> > __le64 target_used[NUM_ENTRY_QWORDS] = {};
> > __le64 cur_used[NUM_ENTRY_QWORDS] = {};
> > + __le64 ignored[NUM_ENTRY_QWORDS] = {};
>
> I think we can avoid extra stack allocation for another STE, if we make
> the function update cur_used directly, but no strong opinion.
It does more than just mask cur_used, it also adjusts ignored:
> > + /*
> > + * Ignored is only used for bits that are used by both entries,
> > + * otherwise it is sequenced according to the unused entry.
> > + */
> > + ignored[i] &= target_used[i] & cur_used[i];
Which also explains this:
> I have some mixed feelings about this, having get_used(), then get_ignored()
> with the same bits set seems confusing to me, specially the get_ignored()
> loops back to update cur_used, which is set from get_used()
The same bits are set because of the above - we need to know what the
actual used bits are to decide if we need to rely on the ignored rule
to do the update.
> My initial though was just to remove this bit from get_used() + some changes
> to checks setting bits that are not used would be enough, and the semantics
> of get_used() can be something as:
> “Return bits used by the updated translation regime that MUST be observed
> atomically” and in that case we can ignore things as MEV as it doesn’t
> impact the translation.
Aside from the above this would cause problems with the validation
assertions, so it is not a great idea.
> However, this approach makes it a bit explicit which bits are ignored, if we
> keep this logic, I think changing the name of get_ignored() might help, to
> something as "get_allowed_break()" or "get_update_safe()"?
update_safe sounds good to me
Jason
next prev parent reply other threads:[~2025-12-16 0:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-10 2:45 [PATCH rc v3 0/4] : iommu/arm-smmu-v3: Fix hitless STE update in nesting cases Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE update sequence Nicolin Chen
2025-12-14 22:32 ` Mostafa Saleh
2025-12-15 20:51 ` Nicolin Chen
2025-12-16 22:49 ` Mostafa Saleh
2025-12-16 0:09 ` Jason Gunthorpe [this message]
2025-12-16 20:46 ` Nicolin Chen
2025-12-16 22:58 ` Mostafa Saleh
2025-12-17 0:23 ` Jason Gunthorpe
2025-12-10 2:45 ` [PATCH rc v3 2/4] iommu/arm-smmu-v3: Ignore STE MEV when computing the " Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 3/4] iommu/arm-smmu-v3: Ignore STE EATS " Nicolin Chen
2025-12-10 2:45 ` [PATCH rc v3 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage Nicolin Chen
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