From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A9F434B1B4; Tue, 16 Dec 2025 11:40:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765885239; cv=none; b=XgCOmffySqhvvv1GH7YhYJb+KyOPIGB+WVZDwtf9mUdciLHeJv4/1q8VD8EWaRc4/nN4dqAceWPmq1ikSIhCIlumNJ9Q5ctXlmmWGtEAaEoUBj/qD1u0b5fYkjiSa8yVUQdKm2e1etO1XV1su8EEo4Rx/zLnySswYTou3QR6D4Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765885239; c=relaxed/simple; bh=/ZYo1U1Yb1GuDgIc0Dz8iOoyM5BvkxIdQcPI8CuSUmg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sOvAEQyDy5rglQsxhcWuY8kXn8soHTa7Y1Hm9qXisTq1PDSesgMx8TcW7HaAo702FPy/ETxe2edcSCiL03N//chOi1QPLn3SMwshphVuRxLvGijODyv+65LxBXA0rQ1xkj2HPJawbTPKdf9aryLG9KVQWFLgLp/wxuFZiCq7cFA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=EHH6s+Am; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="EHH6s+Am" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A071FC4CEF5; Tue, 16 Dec 2025 11:40:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1765885239; bh=/ZYo1U1Yb1GuDgIc0Dz8iOoyM5BvkxIdQcPI8CuSUmg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EHH6s+AmCJxkS44tcIy85eC0z0s8z65bDWW9AR3YehQqUVoii9YML8V6/yLXrPdpc 588MpnXHPTREANeM2iLs7Lz/Rp99yYdMvOyJn88BVQcChP2QLi6K5FeF02GyU7v7HZ XldiioPyz9t+Z2dasIDhpGxrmf8kcJwi7EGuKlGs= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Tim Harvey , Peng Fan , Shawn Guo , Sasha Levin Subject: [PATCH 6.17 062/507] arm64: dts: imx8mp-venice-gw702x: remove off-board uart Date: Tue, 16 Dec 2025 12:08:23 +0100 Message-ID: <20251216111347.789813288@linuxfoundation.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251216111345.522190956@linuxfoundation.org> References: <20251216111345.522190956@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.17-stable review patch. If anyone has any objections, please let me know. ------------------ From: Tim Harvey [ Upstream commit effe98060f70eb96e142f656e750d6af275ceac3 ] UART1 and UART3 go to a connector for use on a baseboard and as such are defined in the baseboard device-trees. Remove them from the gw702x SOM device-tree. Fixes: 0d5b288c2110 ("arm64: dts: freescale: Add imx8mp-venice-gw7905-2x") Signed-off-by: Tim Harvey Reviewed-by: Peng Fan Signed-off-by: Shawn Guo Signed-off-by: Sasha Levin --- .../dts/freescale/imx8mp-venice-gw702x.dtsi | 28 ------------------- 1 file changed, 28 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi index 303995a8adce8..086ee4510cd83 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi @@ -395,13 +395,6 @@ &i2c3 { status = "okay"; }; -/* off-board header */ -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - /* console */ &uart2 { pinctrl-names = "default"; @@ -409,13 +402,6 @@ &uart2 { status = "okay"; }; -/* off-board header */ -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "okay"; -}; - /* off-board */ &usdhc1 { pinctrl-names = "default"; @@ -520,13 +506,6 @@ MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x400001c2 >; }; - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 - MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 - >; - }; - pinctrl_uart2: uart2grp { fsl,pins = < MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 @@ -534,13 +513,6 @@ MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 >; }; - pinctrl_uart3: uart3grp { - fsl,pins = < - MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 - MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 - >; - }; - pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 -- 2.51.0