[PATCH v2 00/16] KVM: x86: Enable APX for guests

["Chang S. Bae" <chang.seok.bae@intel.com>]

Hi all,

Here is a summary of changes since the last posting [1]:

  * PATCH 2/3: Move EGPR accessor code to x86.c (Paolo)
  * PATCH 11:  Rename NoRex to NoRex2 (Paolo)
  * PATCH 05:  Remove an unused function parameter (Chao)
  * PATCH 7/8: Reorder nVMX changes after VMX patches (Chao)

With this posting, I would like to see if I can collect some review tags.

For anyone looking at this series for the first time, please refer to the
initial RFC posting cover and the related discussions [3], while a brief
overview is here:

  APX [2] extends the general-purpose register set (EGPRs). Unlike legacy
  GPRs, the state is not cached by KVM, so will be accessed directly to
  live hardware registers (Part1). Based on that, VMX exit handling
  (Part2) and instruction emulation (Part3) are updated before the
  feature is exposed to guests (Part4).

  * Part1, PATCH 01-03: GPR accessor refactoring and EGPR support
  * Part2, PATCH 04-08: VMX handler changes for EGPR indices
  * Part3, PATCH 09-12: Emulator changes for REX2 support
  * Part4, PATCH 13-16: Feature expossure and self-tests

The series is also available here:
  git://github.com/intel/apx.git apx-kvm_v2

This version is rebased on v6.19-rc5. I do not see any direct dependency
on other pending changes right now; any conflict should be manageable
later.

Thanks,
Chang

[1] V1: https://lore.kernel.org/kvm/20251221040742.29749-1-chang.seok.bae@intel.com/
[2] APX Architecture Specification:
    https://cdrdv2.intel.com/v1/dl/getContent/784266
[3] RFC: https://lore.kernel.org/kvm/20251110180131.28264-1-chang.seok.bae@intel.com/

Chang S. Bae (15):
  KVM: x86: Rename register accessors to be GPR-specific
  KVM: x86: Refactor GPR accessors to differentiate register access
    types
  KVM: x86: Implement accessors for extended GPRs
  KVM: VMX: Introduce unified instruction info structure
  KVM: VMX: Refactor instruction information retrieval
  KVM: VMX: Refactor GPR index retrieval from exit qualification
  KVM: VMX: Support extended register index in exit handling
  KVM: nVMX: Propagate the extended instruction info field
  KVM: emulate: Support EGPR accessing and tracking
  KVM: emulate: Handle EGPR index and REX2-incompatible opcodes
  KVM: emulate: Support REX2-prefixed opcode decode
  KVM: emulate: Reject EVEX-prefixed instructions
  KVM: x86: Guard valid XCR0.APX settings
  KVM: x86: Expose APX sub-features to guests
  KVM: x86: selftests: Add APX state handling and XCR0 sanity checks

Peter Fang (1):
  KVM: x86: Expose APX foundational feature bit to guests

 arch/x86/include/asm/kvm_host.h               |  19 +++
 arch/x86/include/asm/kvm_vcpu_regs.h          |  16 +++
 arch/x86/include/asm/vmx.h                    |   2 +
 arch/x86/kvm/Kconfig                          |   4 +
 arch/x86/kvm/cpuid.c                          |  14 +-
 arch/x86/kvm/emulate.c                        | 121 +++++++++++-----
 arch/x86/kvm/kvm_emulate.h                    |  11 +-
 arch/x86/kvm/reverse_cpuid.h                  |   6 +
 arch/x86/kvm/svm/svm.c                        |  23 +++-
 arch/x86/kvm/vmx/nested.c                     |  87 ++++++------
 arch/x86/kvm/vmx/nested.h                     |   2 +-
 arch/x86/kvm/vmx/vmcs12.c                     |   1 +
 arch/x86/kvm/vmx/vmcs12.h                     |   3 +-
 arch/x86/kvm/vmx/vmx.c                        |  26 ++--
 arch/x86/kvm/vmx/vmx.h                        | 106 ++++++++++++--
 arch/x86/kvm/x86.c                            | 130 ++++++++++++++++--
 arch/x86/kvm/x86.h                            |  24 +++-
 arch/x86/kvm/xen.c                            |   2 +-
 .../selftests/kvm/include/x86/processor.h     |   1 +
 tools/testing/selftests/kvm/x86/state_test.c  |   6 +
 .../selftests/kvm/x86/xcr0_cpuid_test.c       |  19 +++
 21 files changed, 498 insertions(+), 125 deletions(-)


base-commit: 0f61b1860cc3f52aef9036d7235ed1f017632193
-- 
2.51.0