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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Kommula Shiva Shankar <kshankar@marvell.com>,
	jasowang@redhat.com, virtualization@lists.linux.dev,
	eperezma@redhat.com, kvm@vger.kernel.org, netdev@vger.kernel.org,
	jerinj@marvell.com, ndabilpuram@marvell.com, schalla@marvell.com,
	dtatulea@nvidia.com
Subject: Re: [PATCH] vhost: fix caching attributes of MMIO regions by setting them explicitly
Date: Tue, 13 Jan 2026 13:25:48 -0400	[thread overview]
Message-ID: <20260113172548.GH812923@nvidia.com> (raw)
In-Reply-To: <20260113022538-mutt-send-email-mst@kernel.org>

On Tue, Jan 13, 2026 at 02:30:13AM -0500, Michael S. Tsirkin wrote:
> > Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
> > Acked-by: Jason Wang <jasowang@redhat.com>
> 
> I also worry a bit about regressing on other hardware.
> Cc nvidia guys.

> > +	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> >  	vm_flags_set(vma, VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP);

This is definitely required and correct if notify.addr comes from a
PCI BAR address.

You need to trace the origin of that memory in all the drivers to
determine if it is OK or not.

For instance mlx5 is:

	kick_addr = mdev->bar_addr + offset;
	res->phys_kick_addr = kick_addr;
[..]
	addr = (phys_addr_t)ndev->mvdev.res.phys_kick_addr;

"bar_addr" is PCI memory so this patch is correct and required for
mlx5.

ifcvf:
                        hw->notify_base_pa = pci_resource_start(pdev, cap.bar) +
                                        le32_to_cpu(cap.offset);
[..]
                hw->vring[i].notify_pa = hw->notify_base_pa +
                        notify_off * hw->notify_off_multiplier;
[..]
	area.addr = vf->vring[idx].notify_pa;

octep:

                        oct_hw->notify_base_pa = pci_resource_start(pdev, cap.bar) +
                                                 le32_to_cpu(cap.offset);
[..]
                oct_hw->vqs[i].notify_pa = oct_hw->notify_base_pa +
                        notify_off * oct_hw->notify_off_multiplier;
[..]
	area.addr = oct_hw->vqs[idx].notify_pa;

pds:
 No idea, it is messed up though:
	area.addr = pdsv->vqs[qid].notify_pa;
    struct pds_vdpa_vq_info {
	dma_addr_t notify_pa;
 Can't cast dma_addr_t to phys_addr_t!

virtio_pci:
 Also messed up:
  	notify.addr = vp_vdpa->vring[qid].notify_pa;
    struct vp_vring {
	resource_size_t notify_pa;
 phys_addr is not a resource_size_t

Guessing pds and virtio_pci are also both fine, even if I gave up trying to
figure out where notify_pa gets set from in the end.

So the patch is OK

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

      parent reply	other threads:[~2026-01-13 17:25 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-02  6:57 [PATCH] vhost: fix caching attributes of MMIO regions by setting them explicitly Kommula Shiva Shankar
2026-01-13  6:19 ` [EXTERNAL] " Shiva Shankar Kommula
2026-01-13  7:30 ` Michael S. Tsirkin
2026-01-13 10:11   ` [EXTERNAL] " Shiva Shankar Kommula
2026-01-13 17:25   ` Jason Gunthorpe [this message]

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