From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Terry Bowman <terry.bowman@amd.com>
Cc: <dave@stgolabs.net>, <dave.jiang@intel.com>,
<alison.schofield@intel.com>, <dan.j.williams@intel.com>,
<bhelgaas@google.com>, <shiju.jose@huawei.com>,
<ming.li@zohomail.com>, <Smita.KoralahalliChannabasappa@amd.com>,
<rrichter@amd.com>, <dan.carpenter@linaro.org>,
<PradeepVineshReddy.Kodamati@amd.com>, <lukas@wunner.de>,
<Benjamin.Cheatham@amd.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
<linux-cxl@vger.kernel.org>, <vishal.l.verma@intel.com>,
<alucerop@amd.com>, <ira.weiny@intel.com>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v14 15/34] PCI/AER: Update struct aer_err_info with kernel-doc formatting
Date: Wed, 14 Jan 2026 19:48:51 +0000 [thread overview]
Message-ID: <20260114194851.000047bc@huawei.com> (raw)
In-Reply-To: <20260114182055.46029-16-terry.bowman@amd.com>
On Wed, 14 Jan 2026 12:20:36 -0600
Terry Bowman <terry.bowman@amd.com> wrote:
> Update the existing 'struct aer_err_info' definition to use kernel-doc
> formatting. Remove the inline comments to reduce noise and do not introduce
> functional changes. This will improve readability and maintainability.
>
> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Hi Terry.
I didn't check but I think kernel-doc script will complain
about partial docs. Other than that possibly needing fixing with
a trivial entry for __pad1
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
>
> Changes in v13->v14:
> - New commit
> ---
> drivers/pci/pci.h | 29 +++++++++++++++++++++++------
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index 41ec38e82c08..dbc547db208a 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -724,16 +724,33 @@ static inline bool pci_dev_binding_disallowed(struct pci_dev *dev)
>
> #define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */
>
> +/**
> + * struct aer_err_info - AER Error Information
> + * @dev: Devices reporting error
> + * @ratelimit_print: Flag to log or not log the devices' error. 0=NotLog/1=Log
> + * @error_dev_num: Number of devices reporting an error
> + * @level: printk level to use in logging
> + * @id: Value from register PCI_ERR_ROOT_ERR_SRC
> + * @severity: AER severity, 0-UNCOR Non-fatal, 1-UNCOR fatal, 2-COR
> + * @root_ratelimit_print: Flag to log or not log the root's error. 0=NotLog/1=Log
The kernel-doc scripts are annoying fussy. Do they not moan about __pad1
being undocumented?
> + * @multi_error_valid: If multiple errors are reported
> + * @first_error: First reported error
> + * @is_cxl: Bus type error: 0-PCI Bus error, 1-CXL Bus error
> + * @tlp_header_valid: Indicates if TLP field contains error information
> + * @status: COR/UNCOR error status
> + * @mask: COR/UNCOR mask
> + * @tlp: Transaction packet information
> + */
> struct aer_err_info {
> struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
> int ratelimit_print[AER_MAX_MULTI_ERR_DEVICES];
> int error_dev_num;
> - const char *level; /* printk level */
> + const char *level;
>
> unsigned int id:16;
>
> - unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */
> - unsigned int root_ratelimit_print:1; /* 0=skip, 1=print */
> + unsigned int severity:2;
> + unsigned int root_ratelimit_print:1;
> unsigned int __pad1:4;
> unsigned int multi_error_valid:1;
>
> @@ -742,9 +759,9 @@ struct aer_err_info {
> unsigned int is_cxl:1;
> unsigned int tlp_header_valid:1;
>
> - unsigned int status; /* COR/UNCOR Error Status */
> - unsigned int mask; /* COR/UNCOR Error Mask */
> - struct pcie_tlp_log tlp; /* TLP Header */
> + unsigned int status;
> + unsigned int mask;
> + struct pcie_tlp_log tlp;
> };
>
> int aer_get_device_error_info(struct aer_err_info *info, int i);
next prev parent reply other threads:[~2026-01-14 19:48 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-14 18:20 [PATCH v14 00/34] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-01-14 18:20 ` [PATCH v14 01/34] PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2026-01-22 18:58 ` Bjorn Helgaas
2026-01-22 19:43 ` Bowman, Terry
2026-01-14 18:20 ` [PATCH v14 02/34] PCI: Update CXL DVSEC definitions Terry Bowman
2026-01-14 18:53 ` Jonathan Cameron
2026-01-19 23:44 ` dan.j.williams
2026-01-22 18:37 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 03/34] PCI: Introduce pcie_is_cxl() Terry Bowman
2026-01-21 1:19 ` dan.j.williams
2026-01-22 18:39 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 04/34] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2026-01-14 18:20 ` [PATCH v14 05/34] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2026-01-14 18:20 ` [PATCH v14 06/34] PCI: Replace cxl_error_is_native() with pcie_aer_is_native() Terry Bowman
2026-01-14 18:55 ` Jonathan Cameron
2026-01-14 20:16 ` Dave Jiang
2026-01-14 20:15 ` Dave Jiang
2026-01-22 18:23 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 07/34] cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c Terry Bowman
2026-01-14 20:51 ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 08/34] cxl/pci: Move CXL driver's RCH error handling into core/ras_rch.c Terry Bowman
2026-01-14 20:35 ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 09/34] PCI/AER: Export pci_aer_unmask_internal_errors() Terry Bowman
2026-01-14 19:01 ` Jonathan Cameron
2026-01-14 19:09 ` Kuppuswamy Sathyanarayanan
2026-01-14 20:40 ` Dave Jiang
2026-01-20 2:09 ` dan.j.williams
2026-01-22 10:31 ` Lukas Wunner
2026-01-22 16:48 ` dan.j.williams
2026-01-22 18:51 ` Lukas Wunner
2026-01-22 18:49 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 10/34] PCI/AER: Update is_internal_error() to be non-static is_aer_internal_error() Terry Bowman
2026-01-14 19:08 ` Jonathan Cameron
2026-01-15 20:42 ` dan.j.williams
2026-01-22 13:34 ` Lukas Wunner
2026-01-22 19:09 ` dan.j.williams
2026-01-22 19:32 ` Lukas Wunner
2026-01-22 21:32 ` dan.j.williams
2026-01-23 12:22 ` Jonathan Cameron
2026-01-20 2:20 ` dan.j.williams
2026-01-20 15:15 ` Bowman, Terry
2026-01-20 16:53 ` dan.j.williams
2026-01-22 18:48 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 11/34] PCI/AER: Move CXL RCH error handling to aer_cxl_rch.c Terry Bowman
2026-01-22 17:23 ` Markus Elfring
2026-01-22 20:05 ` Bowman, Terry
2026-01-22 18:53 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 12/34] PCI/AER: Use guard() in cxl_rch_handle_error_iter() Terry Bowman
2026-01-14 19:11 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 13/34] PCI/AER: Replace PCIEAER_CXL symbol with CXL_RAS Terry Bowman
2026-01-14 19:12 ` Jonathan Cameron
2026-01-14 20:49 ` Dave Jiang
2026-01-14 20:50 ` Dave Jiang
2026-01-22 18:24 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 14/34] PCI/AER: Report CXL or PCIe bus type in AER trace logging Terry Bowman
2026-01-14 19:45 ` Jonathan Cameron
2026-01-15 15:55 ` Mauro Carvalho Chehab
2026-01-14 20:56 ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 15/34] PCI/AER: Update struct aer_err_info with kernel-doc formatting Terry Bowman
2026-01-14 19:48 ` Jonathan Cameron [this message]
2026-01-15 20:56 ` dan.j.williams
2026-01-14 21:06 ` Dave Jiang
2026-01-22 18:29 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 16/34] cxl/mem: Clarify @host for devm_cxl_add_nvdimm() Terry Bowman
2026-01-14 19:49 ` Jonathan Cameron
2026-01-14 21:08 ` Dave Jiang
2026-01-16 3:07 ` dan.j.williams
2026-01-16 16:22 ` Dave Jiang
2026-01-14 18:20 ` [PATCH v14 17/34] cxl: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2026-01-14 18:20 ` [PATCH v14 18/34] cxl/port: Remove "enumerate dports" helpers Terry Bowman
2026-01-14 19:50 ` Jonathan Cameron
2026-01-14 21:23 ` Dave Jiang
2026-01-16 3:15 ` dan.j.williams
2026-01-14 21:24 ` Dave Jiang
2026-01-16 3:21 ` dan.j.williams
2026-01-14 18:20 ` [PATCH v14 19/34] cxl/port: Fix devm resource leaks around with dport management Terry Bowman
2026-01-14 21:26 ` Dave Jiang
2026-01-15 14:46 ` Jonathan Cameron
2026-01-16 4:45 ` dan.j.williams
2026-01-16 15:01 ` Jonathan Cameron
2026-01-16 16:16 ` Jonathan Cameron
2026-01-19 23:02 ` dan.j.williams
2026-01-20 12:25 ` Jonathan Cameron
2026-01-19 2:48 ` dan.j.williams
2026-01-14 18:20 ` [PATCH v14 20/34] cxl/port: Move dport operations to a driver event Terry Bowman
2026-01-14 21:45 ` Dave Jiang
2026-01-15 14:56 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 21/34] cxl/port: Move dport RAS reporting to a port resource Terry Bowman
2026-01-14 21:47 ` Dave Jiang
2026-01-15 15:02 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 22/34] cxl: Update CXL Endpoint tracing Terry Bowman
2026-01-14 18:20 ` [PATCH v14 23/34] cxl: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2026-01-14 21:53 ` Dave Jiang
2026-01-15 15:17 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 24/34] cxl/port: Move endpoint component register management to cxl_port Terry Bowman
2026-01-14 21:55 ` Dave Jiang
2026-01-15 15:28 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 25/34] cxl/port: Map Port component registers before switchport init Terry Bowman
2026-01-14 21:59 ` Dave Jiang
2026-01-15 15:30 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 26/34] cxl: Change CXL handlers to use guard() instead of scoped_guard() Terry Bowman
2026-01-23 10:05 ` Markus Elfring
2026-01-14 18:20 ` [PATCH v14 27/34] PCI/ERR: Introduce PCI_ERS_RESULT_PANIC Terry Bowman
2026-01-14 18:58 ` Kuppuswamy Sathyanarayanan
2026-01-14 19:20 ` Bowman, Terry
2026-01-14 19:45 ` Kuppuswamy Sathyanarayanan
2026-01-14 18:20 ` [PATCH v14 28/34] PCI/AER: Move AER driver's CXL VH handling to pcie/aer_cxl_vh.c Terry Bowman
2026-01-15 15:40 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 29/34] cxl/port: Unify endpoint and switch port lookup Terry Bowman
2026-01-14 23:04 ` Dave Jiang
2026-01-15 15:44 ` Jonathan Cameron
2026-01-14 18:20 ` [PATCH v14 30/34] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2026-01-14 23:18 ` Dave Jiang
2026-01-16 14:42 ` Bowman, Terry
2026-01-15 16:01 ` Jonathan Cameron
2026-01-15 17:29 ` Bowman, Terry
2026-01-22 18:32 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 31/34] PCI: Introduce CXL Port protocol error handlers Terry Bowman
2026-01-14 23:37 ` Dave Jiang
2026-01-15 16:12 ` Jonathan Cameron
2026-01-22 18:27 ` Bjorn Helgaas
2026-01-14 18:20 ` [PATCH v14 32/34] cxl: Update Endpoint uncorrectable protocol error handling Terry Bowman
2026-01-14 22:07 ` dan.j.williams
2026-01-15 15:26 ` Bowman, Terry
2026-01-15 15:27 ` Bowman, Terry
2026-01-14 18:20 ` [PATCH v14 33/34] cxl: Update Endpoint correctable " Terry Bowman
2026-01-14 18:20 ` [PATCH v14 34/34] cxl: Enable CXL protocol errors during CXL Port probe Terry Bowman
2026-01-15 16:18 ` Jonathan Cameron
2026-01-15 19:41 ` Bowman, Terry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260114194851.000047bc@huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=Benjamin.Cheatham@amd.com \
--cc=PradeepVineshReddy.Kodamati@amd.com \
--cc=Smita.KoralahalliChannabasappa@amd.com \
--cc=alison.schofield@intel.com \
--cc=alucerop@amd.com \
--cc=bhelgaas@google.com \
--cc=dan.carpenter@linaro.org \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=ming.li@zohomail.com \
--cc=rrichter@amd.com \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=shiju.jose@huawei.com \
--cc=terry.bowman@amd.com \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.