From: E Shattow <e@freeshell.de>
To: Minda Chen <minda.chen@starfivetech.com>,
Hal Feng <hal.feng@starfivetech.com>,
Leo Liang <ycliang@andestech.com>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
Tom Rini <trini@konsulko.com>, Sumit Garg <sumit.garg@kernel.org>
Cc: u-boot@lists.denx.de, E Shattow <e@freeshell.de>,
Icenowy Zheng <uwu@icenowy.me>,
Conor Dooley <conor.dooley@microchip.com>,
Sumit Garg <sumit.garg@oss.qualcomm.com>
Subject: [PATCH v3 2/5] riscv: dts: starfive: add Orange Pi RV
Date: Tue, 20 Jan 2026 07:53:35 -0800 [thread overview]
Message-ID: <20260120155406.34916-3-e@freeshell.de> (raw)
In-Reply-To: <20260120155406.34916-1-e@freeshell.de>
From: Icenowy Zheng <uwu@icenowy.me>
Orange Pi RV is a SBC based on the StarFive VisionFive 2 board.
Orange Pi RV features:
- StarFive JH7110 SoC
- GbE port connected to JH7110 GMAC0 via YT8531 PHY
- 4x USB ports via VL805 PCIe USB controller connected to JH7110 pcie0
- M.2 M-key slot connected to JH7110 pcie1
- HDMI video output
- 3.5mm audio output
- Ampak AP6256 SDIO Wi-Fi/Bluetooth module on mmc0
- microSD slot on mmc1
- SPI NOR flash memory
- 24c02 EEPROM (read only by default)
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: E Shattow <e@freeshell.de>
[conor: amend comment to say what's missing]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 5b70764e10190d57e6cd3287d3a3b06f8c89f69c ]
(cherry picked from commit ca39a8e36acbe7d258cadee4ae703fbaac60e18b)
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
---
.../src/riscv/starfive/jh7110-orangepi-rv.dts | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 dts/upstream/src/riscv/starfive/jh7110-orangepi-rv.dts
diff --git a/dts/upstream/src/riscv/starfive/jh7110-orangepi-rv.dts b/dts/upstream/src/riscv/starfive/jh7110-orangepi-rv.dts
new file mode 100644
index 00000000000..053c35992ec
--- /dev/null
+++ b/dts/upstream/src/riscv/starfive/jh7110-orangepi-rv.dts
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
+ */
+
+/dts-v1/;
+#include "jh7110-common.dtsi"
+
+/ {
+ model = "Xunlong Orange Pi RV";
+ compatible = "xunlong,orangepi-rv", "starfive,jh7110";
+
+ /* This regulator is always on by hardware */
+ reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3-pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&gmac0 {
+ assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+ assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+ starfive,tx-use-rgmii-clk;
+ status = "okay";
+};
+
+&mmc0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cap-sd-highspeed;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ vmmc-supply = <®_vcc3v3_pcie>;
+ vqmmc-supply = <&vcc_3v3>;
+ status = "okay";
+
+ ap6256: wifi@1 {
+ compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+ /* TODO: out-of-band IRQ on GPIO21, lacking pinctrl support */
+ };
+};
+
+&mmc1 {
+ cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&phy0 {
+ rx-internal-delay-ps = <1500>;
+ tx-internal-delay-ps = <1500>;
+ motorcomm,rx-clk-drv-microamp = <3970>;
+ motorcomm,rx-data-drv-microamp = <2910>;
+ motorcomm,tx-clk-adj-enabled;
+ motorcomm,tx-clk-10-inverted;
+ motorcomm,tx-clk-100-inverted;
+ motorcomm,tx-clk-1000-inverted;
+};
+
+&pwmdac {
+ status = "okay";
+};
--
2.50.0
next prev parent reply other threads:[~2026-01-20 15:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 15:53 [PATCH v3 0/5] Add upstream board Xunlong Orange Pi RV E Shattow
2026-01-20 15:53 ` [PATCH v3 1/5] dt-bindings: riscv: starfive: add xunlong,orangepi-rv E Shattow
2026-01-20 15:53 ` E Shattow [this message]
2026-01-20 15:53 ` [PATCH v3 3/5] board: starfive: visionfive2: Add Orange Pi RV selection by product_id E Shattow
2026-01-20 15:53 ` [PATCH v3 4/5] configs: starfive: Add Orange Pi RV to visionfive2 E Shattow
2026-01-20 15:53 ` [PATCH v3 5/5] doc: board: starfive: Add Xunlong OrangePi RV E Shattow
2026-02-09 11:18 ` [PATCH v3 0/5] Add upstream board Xunlong Orange Pi RV Leo Liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260120155406.34916-3-e@freeshell.de \
--to=e@freeshell.de \
--cc=conor.dooley@microchip.com \
--cc=hal.feng@starfivetech.com \
--cc=minda.chen@starfivetech.com \
--cc=sumit.garg@kernel.org \
--cc=sumit.garg@oss.qualcomm.com \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
--cc=uwu@icenowy.me \
--cc=xypron.glpk@gmx.de \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.