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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4804705b277sm7496065e9.12.2026.01.21.10.55.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jan 2026 10:55:42 -0800 (PST) Date: Wed, 21 Jan 2026 18:55:40 +0000 From: David Laight To: Uros Bizjak Cc: Brian Gerst , "H. Peter Anvin" , linux-kernel@vger.kernel.org, tip-bot2 for Uros Bizjak , linux-tip-commits@vger.kernel.org, "Borislav Petkov (AMD)" , Michael Kelley , x86@kernel.org Subject: Re: [tip: x86/cleanups] x86/segment: Use MOVL when reading segment registers Message-ID: <20260121185540.020f7b72@pumpkin> In-Reply-To: References: <20260105090422.6243-1-ubizjak@gmail.com> <176891088183.510.8607818928752445249.tip-bot2@tip-bot2> <3A54B6DC-2462-41DA-8C34-D38CCD2A9A2B@zytor.com> <20260121140857.3544d19e@pumpkin> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Wed, 21 Jan 2026 17:16:53 +0100 Uros Bizjak wrote: > On Wed, Jan 21, 2026 at 5:06=E2=80=AFPM David Laight > wrote: > > > > On Wed, 21 Jan 2026 06:49:16 -0500 > > Brian Gerst wrote: > > =20 > > > On Wed, Jan 21, 2026 at 2:29=E2=80=AFAM H. Peter Anvin wrote: =20 > > > > > > > > On January 20, 2026 4:08:01 AM PST, tip-bot2 for Uros Bizjak wrote: =20 > > > > >The following commit has been merged into the x86/cleanups branch = of tip: > > > > > > > > > >Commit-ID: 53ed3d91a141f5c8b3bce45b0004fbbfefe77956 > > > > >Gitweb: https://git.kernel.org/tip/53ed3d91a141f5c8b3bce45b= 0004fbbfefe77956 > > > > >Author: Uros Bizjak > > > > >AuthorDate: Mon, 05 Jan 2026 10:02:32 +01:00 > > > > >Committer: Borislav Petkov (AMD) > > > > >CommitterDate: Tue, 20 Jan 2026 12:34:58 +01:00 > > > > > > > > > >x86/segment: Use MOVL when reading segment registers > > > > > > > > > >Use MOVL when reading segment registers to avoid 0x66 operand-size= override > > > > >insn prefix. The segment value is always 16-bit and gets zero-exte= nded to the > > > > >full 32-bit size. > > > > > > > > > >Example: > > > > > > > > > > 4e4: 66 8c c0 mov %es,%ax > > > > > 4e7: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx) > > > > > > > > > > 4e4: 8c c0 mov %es,%eax > > > > > 4e6: 66 89 83 80 0b 00 00 mov %ax,0xb80(%rbx) > > > > > > > > > >Also, use the %k0 modifier which generates the SImode (signed inte= ger) > > > > >register name for the target register. > > > > > > > > > > [ bp: Extend and clarify commit message. ] > > > > > > > > > >Signed-off-by: Uros Bizjak > > > > >Signed-off-by: Borislav Petkov (AMD) > > > > >Reviewed-by: H. Peter Anvin (Intel) > > > > >Tested-by: Michael Kelley > > > > >Link: https://patch.msgid.link/20260105090422.6243-1-ubizjak@gmail= .com > > > > >--- > > > > > arch/x86/include/asm/segment.h | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > >diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm= /segment.h > > > > >index f59ae71..9f5be2b 100644 > > > > >--- a/arch/x86/include/asm/segment.h > > > > >+++ b/arch/x86/include/asm/segment.h > > > > >@@ -348,7 +348,7 @@ static inline void __loadsegment_fs(unsigned s= hort value) > > > > > * Save a segment register away: > > > > > */ > > > > > #define savesegment(seg, value) \ > > > > >- asm("mov %%" #seg ",%0":"=3Dr" (value) : : "memory") > > > > >+ asm("movl %%" #seg ",%k0" : "=3Dr" (value) : : "memory") > > > > > > > > > > #endif /* !__ASSEMBLER__ */ > > > > > #endif /* __KERNEL__ */ > > > > > =20 > > > > > > > > Incidentally, why aren't we using =3Drm here? Segment moves support= memory operands. =20 > > > > > > You would have to be really careful to only use short (16-bit) > > > variables, because it will not zero-extend with a memory operand. > > > =20 > > > > It would be much safer to have something that returned the value > > of the segment register (zero extended to 32 bits). =20 >=20 > movl from %seg to 32-bit register (as proposed in the patch) > zero-extends the value all the way to word size (64-bits on x86_64). > The proposed solution also handles memory operands, so: >=20 > --cut here-- > unsigned int m; >=20 > void foo(void) > { > asm("mov %%gs,%k0" : "=3Dr"(m)); > } > --cut here-- >=20 > compiles to optimal code: >=20 > 0000000000000000 : > 0: 8c e8 mov %gs,%eax > 2: 89 05 00 00 00 00 mov %eax,0x0(%rip) # 8 > 4: R_X86_64_PC32 m-0x4 > 8: c3 ret >=20 > Uros. As does this version: unsigned int m; #define get_seg(seg) ({ \ unsigned int _seg_val; \ asm("mov %%" #seg ",%k0" : "=3Dr"(_seg_val)); \ _seg_val; \ }) void bar(void) { m =3D get_seg(gs); } bar: movl %gs, %eax movl %eax, m(%rip) retq Without the hidden lvalue. David