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From: Rob Herring <robh@kernel.org>
To: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Linus Walleij <linusw@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Srinivas Kandagatla <srini@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi-pinctrl: Add SA8775P and QCS8300 pinctrl
Date: Tue, 27 Jan 2026 08:17:40 -0600	[thread overview]
Message-ID: <20260127141740.GA1574044-robh@kernel.org> (raw)
In-Reply-To: <20260127105511.3917491-1-mohammad.rafi.shaik@oss.qualcomm.com>

On Tue, Jan 27, 2026 at 04:25:11PM +0530, Mohammad Rafi Shaik wrote:
> Document compatible for Qualcomm SA8775P and QCS8300 SoC LPASS TLMM
> pin controller, fully compatible with previous SM8450 generation
> (same amount of pins and functions).
> 
> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
> ---
> changes in [v3]:
>  - Removed the duplicate driver code patch as suggested by Krzysztof.
>  - Reused the existing SM8490 pinctrl, which is fully compatible with SA8775P and QCS8300.
>  - Link to V2: https://lore.kernel.org/all/20260107192007.500995-1-mohammad.rafi.shaik@oss.qualcomm.com/
> 
> changes in [v2]:
>  - Fixed dt-binding errors reported by Krzysztof and Rob.
>  - Added proper slew rate value for wsa2_swr_data GPIO, as suggested by Konrad.
>  - Documented Monaco compatible as suggested by Konrad.
>  - Link to V1: https://lore.kernel.org/all/20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com/
> ---
>  .../pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml         | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> index e7565592d..354629c38 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml
> @@ -15,7 +15,15 @@ description:
>  
>  properties:
>    compatible:
> -    const: qcom,sm8450-lpass-lpi-pinctrl
> +    oneOf:
> +      - const: qcom,sm8450-lpass-lpi-pinctrl
> +      - items:
> +          - enum:
> +              - qcom,qcs8300-lpass-lpi-pinctrl
> +              - qcom,sa8775p-lpass-lpi-pinctrl
> +          - const: qcom,sm8450-lpass-lpi-pinctrl
> +        minItems: 1
> +        maxItems: 2

No. You are either backwards compatible with sm8450 or you aren't. The 
h/w is fixed.

Rob

  parent reply	other threads:[~2026-01-27 14:17 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-27 10:55 [PATCH v3] dt-bindings: pinctrl: qcom,sm8450-lpass-lpi-pinctrl: Add SA8775P and QCS8300 pinctrl Mohammad Rafi Shaik
2026-01-27 12:19 ` Rob Herring (Arm)
2026-01-27 14:17 ` Rob Herring [this message]
2026-01-27 18:13   ` Mohammad Rafi Shaik
2026-01-27 18:27     ` Rob Herring
2026-01-29 10:33       ` Mohammad Rafi Shaik
  -- strict thread matches above, loose matches on Subject: below --
2026-01-28  1:17 kernel test robot

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