From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56B07314A8E for ; Wed, 28 Jan 2026 23:17:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769642260; cv=none; b=VbmOZeve9UWsYRCsMg3AtlLDqe4h1eEFHBPyAP9J+iha6cfGD6WYqqjuL17PfLHn/6m9f8JyOqO6Ej7lxc3hrvVjYIDHq47KsJOvkHq9+a+CuDH1WJaEsFyHTGB+7SojgJvvdNUpNrgnEAqSXhrP+/INNVwhJgndp4/pZ1wNgjs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769642260; c=relaxed/simple; bh=X6eVlD0wWTJwoNEwxzsqjt1g8gKZ9ft2Xlc5mBum9NY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Twh+tzEXbAgNVRW4Gr+vnotVXCofXo/aeUps9HfuGwMeey/bRi/y8hunnY8b4AggDK/rurg6999bxzBH7dU88lBLCKqS0HAlLO2OJ4g+4ygVPrakDmdfdf3j6AAd7SfGM4d0cnziYDzHcFvcIgNt3F35keJSBT2Hk1bn83JDBJc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fKkb2IxQ; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fKkb2IxQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769642259; x=1801178259; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X6eVlD0wWTJwoNEwxzsqjt1g8gKZ9ft2Xlc5mBum9NY=; b=fKkb2IxQPhD6xkYcePEIfjKg7hYIgKv8pR2wl7nye++3Uk2bPJx/VMsA zPuNvBqscDCxacqAytQTFEuzz4+ZgBYIuBl2F39trjQJNeccCNgONsJDK xqtTG6ZgLDYofA31GUvrsiikmFZLGULSXlYr8d/8vjDsnb3V5yC5q6u5g 4DtwgucSHCnvbqMC2YoPQ8U07V/agwc9pW1tuhrOKuL9gOTQumRCZW4GL 75idoLRlKCtU9J4lfQLGyIeSfELD9KfNf1EoyaZbwwqNPprR34qDT4pi7 9J3mDnVwl58H4YSedi9+fHmzw/MZ1Mejpcj1jjsTJlK/7WknzhbBwjSKH Q==; X-CSE-ConnectionGUID: KmAJfQkMSl2NNzxnMy1cew== X-CSE-MsgGUID: swdNzNCYQDWxbqVWUGNJnw== X-IronPort-AV: E=McAfee;i="6800,10657,11685"; a="73462313" X-IronPort-AV: E=Sophos;i="6.21,258,1763452800"; d="scan'208";a="73462313" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2026 15:17:38 -0800 X-CSE-ConnectionGUID: 2FkKWPuER+ml+TpE6QAjEg== X-CSE-MsgGUID: HdmXgQTDRBeyAmnBuEbHGA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,258,1763452800"; d="scan'208";a="208001763" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.43]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2026 15:17:37 -0800 From: Zide Chen To: qemu-devel@nongnu.org, kvm@vger.kernel.org, Paolo Bonzini , Zhao Liu , Peter Xu , Fabiano Rosas Cc: Xiaoyao Li , Dongli Zhang , Dapeng Mi , Zide Chen Subject: [PATCH V2 02/11] target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSR Date: Wed, 28 Jan 2026 15:09:39 -0800 Message-ID: <20260128231003.268981-3-zide.chen@intel.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260128231003.268981-1-zide.chen@intel.com> References: <20260128231003.268981-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Dapeng Mi MSR_CORE_PERF_GLOBAL_OVF_CTRL is a write-only MSR and reads always return zero. Saving and restoring this MSR is therefore unnecessary. Replace VMSTATE_UINT64 with VMSTATE_UNUSED in the VMStateDescription to ignore env.msr_global_ovf_ctrl during migration. This avoids the need to bump version_id and does not introduce any migration incompatibility. Signed-off-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: - No changes. target/i386/cpu.h | 1 - target/i386/kvm/kvm.c | 6 ------ target/i386/machine.c | 4 ++-- 3 files changed, 2 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f02812bfd19f..f6e9b274e2ff 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2086,7 +2086,6 @@ typedef struct CPUArchState { uint64_t msr_fixed_ctr_ctrl; uint64_t msr_global_ctrl; uint64_t msr_global_status; - uint64_t msr_global_ovf_ctrl; uint64_t msr_fixed_counters[MAX_FIXED_COUNTERS]; uint64_t msr_gp_counters[MAX_GP_COUNTERS]; uint64_t msr_gp_evtsel[MAX_GP_COUNTERS]; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 7b9b740a8e5a..cffbc90d1c50 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -4069,8 +4069,6 @@ static int kvm_put_msrs(X86CPU *cpu, KvmPutState level) if (has_architectural_pmu_version > 1) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_STATUS, env->msr_global_status); - kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_OVF_CTRL, - env->msr_global_ovf_ctrl); /* Now start the PMU. */ kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR_CTRL, @@ -4588,7 +4586,6 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR_CTRL, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_CTRL, 0); kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_STATUS, 0); - kvm_msr_entry_add(cpu, MSR_CORE_PERF_GLOBAL_OVF_CTRL, 0); } for (i = 0; i < num_architectural_pmu_fixed_counters; i++) { kvm_msr_entry_add(cpu, MSR_CORE_PERF_FIXED_CTR0 + i, 0); @@ -4917,9 +4914,6 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_CORE_PERF_GLOBAL_STATUS: env->msr_global_status = msrs[i].data; break; - case MSR_CORE_PERF_GLOBAL_OVF_CTRL: - env->msr_global_ovf_ctrl = msrs[i].data; - break; case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR0 + MAX_FIXED_COUNTERS - 1: env->msr_fixed_counters[index - MSR_CORE_PERF_FIXED_CTR0] = msrs[i].data; break; diff --git a/target/i386/machine.c b/target/i386/machine.c index c9139612813b..1125c8a64ec5 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -666,7 +666,7 @@ static bool pmu_enable_needed(void *opaque) int i; if (env->msr_fixed_ctr_ctrl || env->msr_global_ctrl || - env->msr_global_status || env->msr_global_ovf_ctrl) { + env->msr_global_status) { return true; } for (i = 0; i < MAX_FIXED_COUNTERS; i++) { @@ -692,7 +692,7 @@ static const VMStateDescription vmstate_msr_architectural_pmu = { VMSTATE_UINT64(env.msr_fixed_ctr_ctrl, X86CPU), VMSTATE_UINT64(env.msr_global_ctrl, X86CPU), VMSTATE_UINT64(env.msr_global_status, X86CPU), - VMSTATE_UINT64(env.msr_global_ovf_ctrl, X86CPU), + VMSTATE_UNUSED(sizeof(uint64_t)), VMSTATE_UINT64_ARRAY(env.msr_fixed_counters, X86CPU, MAX_FIXED_COUNTERS), VMSTATE_UINT64_ARRAY(env.msr_gp_counters, X86CPU, MAX_GP_COUNTERS), VMSTATE_UINT64_ARRAY(env.msr_gp_evtsel, X86CPU, MAX_GP_COUNTERS), -- 2.52.0