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envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org v2: https://lore.kernel.org/qemu-devel/20260127153736.62730-1-iii@linux.ibm.com/ v2 -> v3: Use FloatParts64 (Richard). Improve "smallish" comment (Richard). Use parts_muladd_scalbn (Richard). Get rid of manual precision rounding (Richard). New patch: parts_round_to_int_normal() improvement. New 64-bit testcase for a fuzzer finding on one of the intermediate versions. I have to admit I did not put down and then forgot what exactly it was about, but it must be interesting, so I decided to keep it. v1: https://lore.kernel.org/qemu-devel/20260121222116.713325-1-iii@linux.ibm.com/ v1 -> v2: Move the implementatation to fpu/ and rewrite using FloatParts (Richard). I can't say I particularly like the way it looks, but at least most macros are gone and it survives fuzzing. Explain why we need -O0 for the test (Alex). New patch: s390_get_bfp_rounding_mode(). Add a few comments with calculation examples to the test. Hi, This series implements DIVIDE TO INTEGER instruction, which is required to run LuaJIT. Patch 1 is a debugging helper, patch 2 is a small refactoring, patch 3 is an improvement for an FPU rounding helper, patch 4 is the implementation. Since the instruction is quite complex, I've extensively tested it using a libFuzzer-based harness [1] that compares emulation with native execution at ~15k exec/s. The tests (patch 5) use data generated this way. Best regards, Ilya [1] https://github.com/iii-i/qemu/commits/iii/wip/fuzz-tcg-v1/ Ilya Leoshkevich (5): target/s390x: Dump Floating-Point-Control Register target/s390x: Extract s390_get_bfp_rounding_mode() fpu: Restrict parts_round_to_int_normal to target precision target/s390x: Implement DIVIDE TO INTEGER tests/tcg/s390x: Test DIVIDE TO INTEGER fpu/softfloat-parts.c.inc | 7 +- fpu/softfloat.c | 144 +++++++++++++++ include/fpu/softfloat.h | 11 ++ target/s390x/cpu-dump.c | 1 + target/s390x/helper.h | 1 + target/s390x/tcg/fpu_helper.c | 118 +++++++++---- target/s390x/tcg/insn-data.h.inc | 5 +- target/s390x/tcg/translate.c | 26 +++ tests/tcg/s390x/Makefile.target | 5 + tests/tcg/s390x/divide-to-integer.c | 265 ++++++++++++++++++++++++++++ 10 files changed, 545 insertions(+), 38 deletions(-) create mode 100644 tests/tcg/s390x/divide-to-integer.c -- 2.52.0