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Tue, 10 Feb 2026 09:10:19 +0000 From: Jamin Lin To: Paolo Bonzini , Peter Maydell , =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Steven Lee , Troy Lee , Andrew Jeffery , Joel Stanley , =?iso-8859-1?Q?Marc-Andr=E9_Lureau?= , =?iso-8859-1?Q?Daniel_P=2E_Berrang=E9?= , =?iso-8859-1?Q?Philippe_Mathieu-Daud=E9?= , "open list:All patches CC here" , "open list:ARM TCG CPUs" CC: Jamin Lin , Troy Lee , Kane Chen , "nabihestefan@google.com" Subject: [PATCH v5 00/21] i3c: aspeed: Add I3C support Thread-Topic: [PATCH v5 00/21] i3c: aspeed: Add I3C support Thread-Index: AQHcmm0UcQRs4EPMvkyppE8BhlWZ8w== Date: Tue, 10 Feb 2026 09:10:19 +0000 Message-ID: <20260210091018.1553489-1-jamin_lin@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: TYPPR06MB8206:EE_|SG2PR06MB5264:EE_ x-ms-office365-filtering-correlation-id: f087ddab-ed06-41f9-db9a-08de688436b8 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: aspeedtech.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYPPR06MB8206.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f087ddab-ed06-41f9-db9a-08de688436b8 X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Feb 2026 09:10:19.5872 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43d4aa98-e35b-4575-8939-080e90d5a249 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 5wVX1XNUeQ2YZy3noecJpt+SyXfVU1Bc8vmG/aI2Eglnxkl3FGbKMkHP9pQfHtOV7rNaAN8EeILJsKWCxpVcrnkBCvBCvuXaHZ80BDEeQV0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR06MB5264 Received-SPF: pass client-ip=2a01:111:f403:c405::7; envelope-from=jamin_lin@aspeedtech.com; helo=TYDPR03CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org v1:=0A= The initial patch series was based on work by Joe Komlodi .=0A= =0A= This series adds I3C bus support to QEMU and adds more functionality to t= he=0A= Aspeed I3C controller.=0A= =0A= This implementation is a basic implementation that introduces IBIs=0A= (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't supp= ort=0A= multi-controller buses or HDR transfers.=0A= =0A= First we add the I3C bus and controller model. With that added we extend= =0A= the functionality of the Aspeed I3C controller so it can do transfers=0A= and handle IBIs.=0A= =0A= Next, we add a mock I3C target. It's intended to be a very simple target= =0A= just to verify that I3C is working on the guest. Internally, we've used i= t=0A= on Linux to verify that i3C devices can be probed and can send/receive da= ta=0A= and IBIs.=0A= This target is sort of like an EEPROM, and it can also send IBIs upon=0A= reception of a user-defined magic number.=0A= =0A= Lastly we add hotplugging support. The hotplugging doesn't do anything t= oo=0A= complicated, it just adds the device attempting to hotplug to the bus. It= =0A= is the device's responsibility to hot-join and go through the DAA process= =0A= to participate on the bus.=0A= =0A= v2:=0A= Jamin Lin has taken ownership of the I3C patch= =0A= series for upstream submission.=0A= =0A= Changes in this version include:=0A= =0A= 1. Added I3C functional tests.=0A= 2. Updated patch 4 to refine register field definitions.=0A= 3. Updated patch 7 to correct read-only register field masks.=0A= =0A= v3:=0A= 1. Add Signed-off-by: Jamin Lin =0A= 2. Fix a typo=0A= 3. Fix ASPEED mail server issue=0A= =0A= v4:=0A= 1. Add Signed-off-by: Jamin Lin at the end of = each patch.=0A= =0A= v5:=0A= 1. Address review feedback by updating the I3C bus and device to use the= =0A= DEFINE_TYPES() macro instead of an explicit type registration function.= =0A= 2. Rename variables to `parent_obj` for the parent object and `parent_cla= ss`=0A= for the parent class to comply with QEMU QOM coding style guidelines.=0A= =0A= Jamin Lin (2):=0A= hw/i3c/aspeed_i3c: Switch to DEFINE_TYPES() and align parent_obj=0A= naming=0A= tests/functional/arm/test_aspeed_ast2600_sdk: Add i3c functional test=0A= =0A= Joe Komlodi (19):=0A= hw/misc/aspeed_i3c: Move to i3c directory=0A= hw/i3c: Add bus support=0A= hw/i3c: Split DesignWare I3C out of Aspeed I3C=0A= hw/i3c/dw-i3c: Add more register fields=0A= hw/i3c/aspeed_i3c: Add more register fields=0A= hw/i3c/dw-i3c: Add more reset values=0A= hw/i3c/aspeed_i3c: Add register RO field masks=0A= hw/i3c/dw-i3c: Add register RO field masks=0A= hw/i3c/dw-i3c: Treat more registers as read-as-zero=0A= hw/i3c/dw-i3c: Use 32 bits on MMIO writes=0A= hw/i3c/dw-i3c: Add IRQ MMIO behavior=0A= hw/i3c/dw-i3c: Add data TX and RX=0A= hw/i3c/dw-i3c: Add IBI handling=0A= hw/i3c/dw-i3c: Add ctrl MMIO handling=0A= hw/i3c/dw-i3c: Add controller resets=0A= hw/i3c/aspeed: Add I3C bus get function=0A= hw/i3c: Add Mock target=0A= hw/arm/aspeed: Build with I3C_DEVICES=0A= hw/i3c: Add hotplug support=0A= =0A= meson.build | 1 +=0A= hw/i3c/trace.h | 2 +=0A= include/hw/arm/aspeed_soc.h | 2 +-=0A= include/hw/{misc =3D> i3c}/aspeed_i3c.h | 31 +-=0A= include/hw/i3c/dw-i3c.h | 199 ++=0A= include/hw/i3c/i3c.h | 277 +++=0A= include/hw/i3c/mock-i3c-target.h | 52 +=0A= hw/i3c/aspeed_i3c.c | 258 +++=0A= hw/i3c/core.c | 664 ++++++=0A= hw/i3c/dw-i3c.c | 1862 +++++++++++++++++=0A= hw/i3c/mock-i3c-target.c | 298 +++=0A= hw/misc/aspeed_i3c.c | 383 ----=0A= hw/Kconfig | 1 +=0A= hw/arm/Kconfig | 3 +=0A= hw/i3c/Kconfig | 15 +=0A= hw/i3c/meson.build | 6 +=0A= hw/i3c/trace-events | 48 +=0A= hw/meson.build | 1 +=0A= hw/misc/meson.build | 1 -=0A= hw/misc/trace-events | 6 -=0A= .../functional/arm/test_aspeed_ast2600_sdk.py | 12 +=0A= 21 files changed, 3710 insertions(+), 412 deletions(-)=0A= create mode 100644 hw/i3c/trace.h=0A= rename include/hw/{misc =3D> i3c}/aspeed_i3c.h (53%)=0A= create mode 100644 include/hw/i3c/dw-i3c.h=0A= create mode 100644 include/hw/i3c/i3c.h=0A= create mode 100644 include/hw/i3c/mock-i3c-target.h=0A= create mode 100644 hw/i3c/aspeed_i3c.c=0A= create mode 100644 hw/i3c/core.c=0A= create mode 100644 hw/i3c/dw-i3c.c=0A= create mode 100644 hw/i3c/mock-i3c-target.c=0A= delete mode 100644 hw/misc/aspeed_i3c.c=0A= create mode 100644 hw/i3c/Kconfig=0A= create mode 100644 hw/i3c/meson.build=0A= create mode 100644 hw/i3c/trace-events=0A= =0A= -- =0A= 2.43.0=0A=