From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Troy Lee" <troy_lee@aspeedtech.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"nabihestefan@google.com" <nabihestefan@google.com>,
"Joe Komlodi" <komlodi@google.com>,
"Patrick Venture" <venture@google.com>,
"Titus Rwantare" <titusr@google.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v5 01/21] hw/misc/aspeed_i3c: Move to i3c directory
Date: Tue, 10 Feb 2026 09:10:21 +0000 [thread overview]
Message-ID: <20260210091018.1553489-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260210091018.1553489-1-jamin_lin@aspeedtech.com>
Moves the Aspeed I3C model and traces into hw/i3c and creates I3C build
files.
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Titus Rwantare <titusr@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
meson.build | 1 +
hw/i3c/trace.h | 2 ++
include/hw/arm/aspeed_soc.h | 2 +-
include/hw/{misc => i3c}/aspeed_i3c.h | 0
hw/{misc => i3c}/aspeed_i3c.c | 2 +-
hw/Kconfig | 1 +
hw/arm/Kconfig | 1 +
hw/i3c/Kconfig | 2 ++
hw/i3c/meson.build | 3 +++
hw/i3c/trace-events | 7 +++++++
hw/meson.build | 1 +
hw/misc/meson.build | 1 -
hw/misc/trace-events | 6 ------
13 files changed, 20 insertions(+), 9 deletions(-)
create mode 100644 hw/i3c/trace.h
rename include/hw/{misc => i3c}/aspeed_i3c.h (100%)
rename hw/{misc => i3c}/aspeed_i3c.c (99%)
create mode 100644 hw/i3c/Kconfig
create mode 100644 hw/i3c/meson.build
create mode 100644 hw/i3c/trace-events
diff --git a/meson.build b/meson.build
index 8c6c0a9a32..d20ec383df 100644
--- a/meson.build
+++ b/meson.build
@@ -3602,6 +3602,7 @@ if have_system
'hw/fsi',
'hw/hyperv',
'hw/i2c',
+ 'hw/i3c',
'hw/i386',
'hw/i386/xen',
'hw/i386/kvm',
diff --git a/hw/i3c/trace.h b/hw/i3c/trace.h
new file mode 100644
index 0000000000..1e0c4eadf0
--- /dev/null
+++ b/hw/i3c/trace.h
@@ -0,0 +1,2 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include "trace/trace-hw_i3c.h"
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index b185b04186..d7b3647ca1 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -23,7 +23,7 @@
#include "hw/timer/aspeed_timer.h"
#include "hw/rtc/aspeed_rtc.h"
#include "hw/i2c/aspeed_i2c.h"
-#include "hw/misc/aspeed_i3c.h"
+#include "hw/i3c/aspeed_i3c.h"
#include "hw/ssi/aspeed_smc.h"
#include "hw/misc/aspeed_hace.h"
#include "hw/misc/aspeed_sbc.h"
diff --git a/include/hw/misc/aspeed_i3c.h b/include/hw/i3c/aspeed_i3c.h
similarity index 100%
rename from include/hw/misc/aspeed_i3c.h
rename to include/hw/i3c/aspeed_i3c.h
diff --git a/hw/misc/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
similarity index 99%
rename from hw/misc/aspeed_i3c.c
rename to hw/i3c/aspeed_i3c.c
index ac6db214ee..fff259ff66 100644
--- a/hw/misc/aspeed_i3c.c
+++ b/hw/i3c/aspeed_i3c.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
-#include "hw/misc/aspeed_i3c.h"
+#include "hw/i3c/aspeed_i3c.h"
#include "hw/core/registerfields.h"
#include "hw/core/qdev-properties.h"
#include "qapi/error.h"
diff --git a/hw/Kconfig b/hw/Kconfig
index 9e6c789ae7..c53f94d96a 100644
--- a/hw/Kconfig
+++ b/hw/Kconfig
@@ -13,6 +13,7 @@ source fsi/Kconfig
source gpio/Kconfig
source hyperv/Kconfig
source i2c/Kconfig
+source i3c/Kconfig
source ide/Kconfig
source input/Kconfig
source intc/Kconfig
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index c66c452737..8344b9769f 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -545,6 +545,7 @@ config ASPEED_SOC
select DS1338
select FTGMAC100
select I2C
+ select I3C
select DPS310
select PCA9552
select PCA9554
diff --git a/hw/i3c/Kconfig b/hw/i3c/Kconfig
new file mode 100644
index 0000000000..e07fe445c6
--- /dev/null
+++ b/hw/i3c/Kconfig
@@ -0,0 +1,2 @@
+config I3C
+ bool
diff --git a/hw/i3c/meson.build b/hw/i3c/meson.build
new file mode 100644
index 0000000000..ebf20325cb
--- /dev/null
+++ b/hw/i3c/meson.build
@@ -0,0 +1,3 @@
+i3c_ss = ss.source_set()
+i3c_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_i3c.c'))
+system_ss.add_all(when: 'CONFIG_I3C', if_true: i3c_ss)
diff --git a/hw/i3c/trace-events b/hw/i3c/trace-events
new file mode 100644
index 0000000000..3ead84eb45
--- /dev/null
+++ b/hw/i3c/trace-events
@@ -0,0 +1,7 @@
+# See docs/devel/tracing.rst for syntax documentation.
+
+# aspeed_i3c.c
+aspeed_i3c_read(uint64_t offset, uint64_t data) "I3C read: offset 0x%" PRIx64 " data 0x%" PRIx64
+aspeed_i3c_write(uint64_t offset, uint64_t data) "I3C write: offset 0x%" PRIx64 " data 0x%" PRIx64
+aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] read: offset 0x%" PRIx64 " data 0x%" PRIx64
+aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] write: offset 0x%" PRIx64 " data 0x%" PRIx64
diff --git a/hw/meson.build b/hw/meson.build
index 1022bdb806..e05dc4864c 100644
--- a/hw/meson.build
+++ b/hw/meson.build
@@ -35,6 +35,7 @@ subdir('dma')
subdir('gpio')
subdir('hyperv')
subdir('i2c')
+subdir('i3c')
subdir('ide')
subdir('input')
subdir('intc')
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index d304a98498..96b6705b7d 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -135,7 +135,6 @@ system_ss.add(when: 'CONFIG_PVPANIC_MMIO', if_true: files('pvpanic-mmio.c'))
system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_hace.c',
- 'aspeed_i3c.c',
'aspeed_lpc.c',
'aspeed_ltpi.c',
'aspeed_pwm.c',
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index d6af2fcf85..b88accc437 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -293,12 +293,6 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri
# aspeed_xdma.c
aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
-# aspeed_i3c.c
-aspeed_i3c_read(uint64_t offset, uint64_t data) "I3C read: offset 0x%" PRIx64 " data 0x%" PRIx64
-aspeed_i3c_write(uint64_t offset, uint64_t data) "I3C write: offset 0x%" PRIx64 " data 0x%" PRIx64
-aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] read: offset 0x%" PRIx64 " data 0x%" PRIx64
-aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] write: offset 0x%" PRIx64 " data 0x%" PRIx64
-
# aspeed_pwm.c
aspeed_pwm_read(uint64_t offset, uint64_t data) "read: offset 0x%" PRIx64 " data 0x%" PRIx64
aspeed_pwm_write(uint64_t offset, uint64_t data) "write: offset 0x%" PRIx64 " data 0x%" PRIx64
--
2.43.0
next prev parent reply other threads:[~2026-02-10 9:13 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 9:10 [PATCH v5 00/21] i3c: aspeed: Add I3C support Jamin Lin
2026-02-10 9:10 ` Jamin Lin [this message]
2026-02-10 9:10 ` [PATCH v5 02/21] hw/i3c/aspeed_i3c: Switch to DEFINE_TYPES() and align parent_obj naming Jamin Lin
2026-02-10 9:10 ` [PATCH v5 03/21] hw/i3c: Add bus support Jamin Lin
2026-02-10 9:10 ` [PATCH v5 04/21] hw/i3c: Split DesignWare I3C out of Aspeed I3C Jamin Lin
2026-02-10 9:10 ` [PATCH v5 05/21] hw/i3c/dw-i3c: Add more register fields Jamin Lin
2026-02-10 9:10 ` [PATCH v5 06/21] hw/i3c/aspeed_i3c: " Jamin Lin
2026-02-10 9:10 ` [PATCH v5 07/21] hw/i3c/dw-i3c: Add more reset values Jamin Lin
2026-02-10 9:10 ` [PATCH v5 08/21] hw/i3c/aspeed_i3c: Add register RO field masks Jamin Lin
2026-02-10 9:10 ` [PATCH v5 09/21] hw/i3c/dw-i3c: " Jamin Lin
2026-02-10 9:10 ` [PATCH v5 10/21] hw/i3c/dw-i3c: Treat more registers as read-as-zero Jamin Lin
2026-02-10 9:10 ` [PATCH v5 11/21] hw/i3c/dw-i3c: Use 32 bits on MMIO writes Jamin Lin
2026-02-10 9:10 ` [PATCH v5 12/21] hw/i3c/dw-i3c: Add IRQ MMIO behavior Jamin Lin
2026-02-10 9:10 ` [PATCH v5 13/21] hw/i3c/dw-i3c: Add data TX and RX Jamin Lin
2026-02-10 9:10 ` [PATCH v5 14/21] hw/i3c/dw-i3c: Add IBI handling Jamin Lin
2026-02-10 9:10 ` [PATCH v5 15/21] hw/i3c/dw-i3c: Add ctrl MMIO handling Jamin Lin
2026-02-10 9:10 ` [PATCH v5 16/21] hw/i3c/dw-i3c: Add controller resets Jamin Lin
2026-02-10 9:10 ` [PATCH v5 17/21] hw/i3c/aspeed: Add I3C bus get function Jamin Lin
2026-02-10 9:10 ` [PATCH v5 18/21] hw/i3c: Add Mock target Jamin Lin
2026-02-10 9:10 ` [PATCH v5 19/21] hw/arm/aspeed: Build with I3C_DEVICES Jamin Lin
2026-02-10 9:10 ` [PATCH v5 20/21] hw/i3c: Add hotplug support Jamin Lin
2026-02-10 9:10 ` [PATCH v5 21/21] tests/functional/arm/test_aspeed_ast2600_sdk: Add i3c functional test Jamin Lin
2026-02-11 13:40 ` Cédric Le Goater
2026-02-12 2:55 ` Jamin Lin
2026-02-13 12:51 ` [PATCH v5 00/21] i3c: aspeed: Add I3C support Cédric Le Goater
2026-02-24 1:29 ` Jamin Lin
2026-02-24 9:22 ` Cédric Le Goater
2026-02-24 9:25 ` Jamin Lin
2026-02-24 9:58 ` Jamin Lin
2026-02-24 10:27 ` Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260210091018.1553489-2-jamin_lin@aspeedtech.com \
--to=jamin_lin@aspeedtech.com \
--cc=andrew@codeconstruct.com.au \
--cc=berrange@redhat.com \
--cc=clg@kaod.org \
--cc=clg@redhat.com \
--cc=joel@jms.id.au \
--cc=kane_chen@aspeedtech.com \
--cc=komlodi@google.com \
--cc=leetroy@gmail.com \
--cc=marcandre.lureau@redhat.com \
--cc=nabihestefan@google.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=titusr@google.com \
--cc=troy_lee@aspeedtech.com \
--cc=venture@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.