[PATCH] drm/i915/gvt: Cast u64 array to u32 array

[Jonathan Cavitt <jonathan.cavitt@intel.com>]

Static analysis issue:

The u64 array workload->shadow_mm->ppgtt_mm.shadow_pdps is cast to a
void pointer and passed as a u32 array to set_context_pdp_root_pointer
as a part of update_shadow_pdps.  This isn't wrong, per se, but we
should properly cast it to an appropriately-sized u32 array before
submission.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
 drivers/gpu/drm/i915/gvt/scheduler.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
index 15fdd514ca83..1a95c9f76faa 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -72,6 +72,7 @@ static void update_shadow_pdps(struct intel_vgpu_workload *workload)
 {
 	struct execlist_ring_context *shadow_ring_context;
 	struct intel_context *ctx = workload->req->context;
+	u32 pdp[8];
 
 	if (WARN_ON(!workload->shadow_mm))
 		return;
@@ -79,9 +80,10 @@ static void update_shadow_pdps(struct intel_vgpu_workload *workload)
 	if (WARN_ON(!atomic_read(&workload->shadow_mm->pincount)))
 		return;
 
+	memcpy(pdp, workload->shadow_mm->ppgtt_mm.shadow_pdps,
+	       sizeof(u64) * ARRAY_SIZE(workload->shadow_mm->ppgtt_mm.shadow_pdps));
 	shadow_ring_context = (struct execlist_ring_context *)ctx->lrc_reg_state;
-	set_context_pdp_root_pointer(shadow_ring_context,
-			(void *)workload->shadow_mm->ppgtt_mm.shadow_pdps);
+	set_context_pdp_root_pointer(shadow_ring_context, pdp);
 }
 
 /*
-- 
2.43.0