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From: Sasha Levin <sashal@kernel.org>
To: patches@lists.linux.dev, stable@vger.kernel.org
Cc: Lili Li <lili.li@intel.com>, Tony Luck <tony.luck@intel.com>,
	Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
	Sasha Levin <sashal@kernel.org>,
	bp@alien8.de, linux-edac@vger.kernel.org
Subject: [PATCH AUTOSEL 6.19-6.18] EDAC/igen6: Add more Intel Panther Lake-H SoCs support
Date: Fri, 13 Feb 2026 19:58:13 -0500	[thread overview]
Message-ID: <20260214005825.3665084-7-sashal@kernel.org> (raw)
In-Reply-To: <20260214005825.3665084-1-sashal@kernel.org>

From: Lili Li <lili.li@intel.com>

[ Upstream commit 4c36e6106997b6ad8f4a279b4bdbca3ed6f53c6c ]

Add more Intel Panther Lake-H SoC compute die IDs for EDAC support.

Signed-off-by: Lili Li <lili.li@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Link: https://patch.msgid.link/20251124131537.3633983-1-qiuxu.zhuo@intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

LLM Generated explanations, may be completely bogus:

Now I have a comprehensive picture. Let me summarize my analysis.

## Detailed Analysis

### 1. Commit Message Analysis

The commit subject is "EDAC/igen6: Add more Intel Panther Lake-H SoCs
support" and the body says "Add more Intel Panther Lake-H SoC compute
die IDs for EDAC support." This is purely a **new device ID addition**
to an existing driver. The commit is authored by Intel employees (Lili
Li, Qiuxu Zhuo) who maintain this specific EDAC driver, and reviewed by
the same team.

### 2. Code Change Analysis

The diff is straightforward and mechanical:

**Part 1 - Macro definitions** (lines ~280-290): Adds 10 new `#define`
constants:
- `DID_PTL_H_SKU4` through `DID_PTL_H_SKU13` with PCI device IDs
  `0xb003`, `0xb004`, `0xb005`, `0xb008`, `0xb011`, `0xb014`, `0xb015`,
  `0xb028`, `0xb029`, `0xb02a`

**Part 2 - PCI device table** (lines ~675-695): Adds 10 new
`PCI_VDEVICE` entries, all pointing to the existing `mtl_p_cfg`
configuration structure — the same configuration used by the 3 initial
PTL-H SKUs.

This is a textbook **PCI device ID addition**. No new logic, no new
config structures, no new functions. Every new entry uses the identical
`mtl_p_cfg` configuration as the existing PTL-H SKUs.

### 3. Classification

This falls squarely into the **"New Device IDs" exception** for stable
trees:
- The driver (`igen6_edac`) already exists in stable trees
- The PTL-H configuration (`mtl_p_cfg`) and initial PTL-H support
  already exist (since v6.13)
- Only new PCI IDs are being added — enabling additional hardware
  variants of the same SoC family

### 4. Scope and Risk Assessment

- **Lines changed**: ~20 (10 `#define`s + 10 PCI table entries)
- **Files touched**: 1 (`drivers/edac/igen6_edac.c`)
- **Risk**: Extremely low. The PCI device table is a static array of ID-
  to-config mappings. The new entries only match hardware with those
  specific PCI IDs. If the hardware isn't present, the entries are
  completely inert. Zero risk to existing functionality.
- **Complexity**: Trivial — pure data addition with no logic changes.

### 5. Dependency Check

This commit has one critical dependency:
- **Initial PTL-H support commit** (`0be9f1af39022`): "EDAC/igen6: Add
  Intel Panther Lake-H SoCs support" — landed in **v6.13**. This commit
  defined `DID_PTL_H_SKU1`-`SKU3` and the usage of `mtl_p_cfg` for
  PTL-H.

Therefore:
- **v6.1 LTS, v6.6 LTS, v6.12 stable**: The prerequisite commit is NOT
  present. Backporting here would require first backporting the initial
  PTL-H support.
- **v6.13+ stable** (v6.13.y, v6.14.y, etc.): The prerequisite IS
  present, so this patch can apply cleanly.

### 6. User Impact

EDAC (Error Detection And Correction) is critical infrastructure for
detecting and reporting memory errors. Without these device IDs, users
with Intel Panther Lake-H SoCs with these specific compute die IDs will
get **no EDAC/ECC error reporting** — meaning memory errors could go
undetected, leading to potential silent data corruption on affected
hardware. This is exactly the kind of hardware enablement that stable
users (particularly enterprise/embedded users) need.

### 7. Stability Indicators

- Reviewed by Intel's EDAC team member (Qiuxu Zhuo)
- Signed off by the RAS maintainer (Tony Luck)
- Same pattern as dozens of prior device ID additions to this driver,
  all of which have been successfully backported to stable trees (Arrow
  Lake, Meteor Lake-P/PS, Raptor Lake-P, Alder Lake-N, etc.)

### 8. Verdict

This is a classic, textbook device ID addition:
- Purely mechanical addition of PCI device IDs
- Uses existing infrastructure (no new code paths)
- Enables EDAC support on additional Panther Lake-H hardware variants
- Extremely low risk — inert on systems without matching hardware
- The only concern is dependency on initial PTL-H support (v6.13+), but
  this is manageable

The commit matches the stable kernel rules for device ID additions
perfectly. It's small, contained, obviously correct, and enables real
hardware support for real users.

**YES**

 drivers/edac/igen6_edac.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 553c31a2d9226..839b6dd3629e9 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -274,6 +274,16 @@ static struct work_struct ecclog_work;
 #define DID_PTL_H_SKU1	0xb000
 #define DID_PTL_H_SKU2	0xb001
 #define DID_PTL_H_SKU3	0xb002
+#define DID_PTL_H_SKU4	0xb003
+#define DID_PTL_H_SKU5	0xb004
+#define DID_PTL_H_SKU6	0xb005
+#define DID_PTL_H_SKU7	0xb008
+#define DID_PTL_H_SKU8	0xb011
+#define DID_PTL_H_SKU9	0xb014
+#define DID_PTL_H_SKU10	0xb015
+#define DID_PTL_H_SKU11	0xb028
+#define DID_PTL_H_SKU12	0xb029
+#define DID_PTL_H_SKU13	0xb02a
 
 /* Compute die IDs for Wildcat Lake with IBECC */
 #define DID_WCL_SKU1	0xfd00
@@ -636,6 +646,16 @@ static struct pci_device_id igen6_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU1), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU2), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU3), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU4), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU5), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU6), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU7), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU8), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU9), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU10), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU11), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU12), (kernel_ulong_t)&mtl_p_cfg },
+	{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU13), (kernel_ulong_t)&mtl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_WCL_SKU1), (kernel_ulong_t)&wcl_cfg },
 	{ },
 };
-- 
2.51.0


  parent reply	other threads:[~2026-02-14  0:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-14  0:58 [PATCH AUTOSEL 6.19-5.10] parisc: Prevent interrupts during reboot Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-6.18] soc: imx8m: Fix error handling for clk_prepare_enable() Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19] soc/tegra: pmc: Fix unsafe generic_handle_irq() call Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-6.18] x86/sev: Use kfree_sensitive() when freeing a SNP message descriptor Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-6.12] firmware: arm_ffa: Unmap Rx/Tx buffers on init failure Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-6.18] EDAC/igen6: Add two Intel Amston Lake SoCs support Sasha Levin
2026-02-14  0:58 ` Sasha Levin [this message]
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-5.10] arm64: tegra: smaug: Add usb-role-switch support Sasha Levin
2026-02-14  0:58 ` [PATCH AUTOSEL 6.19-6.12] Revert "arm64: zynqmp: Add an OP-TEE node to the device tree" Sasha Levin
2026-02-16 10:21 ` [PATCH AUTOSEL 6.19-5.10] parisc: Prevent interrupts during reboot Geert Uytterhoeven
2026-02-16 13:12   ` Sasha Levin
2026-02-16 13:28     ` Geert Uytterhoeven
2026-02-16 15:48       ` Sasha Levin

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