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From: "Ionut Nechita (Sunlight Linux)" <sunlightlinux@gmail.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>
Cc: Zhang Rui <rui.zhang@intel.com>,
	Lukasz Luba <lukasz.luba@arm.com>, Lukas Wunner <lukas@wunner.de>,
	Ionut Nechita <sunlightlinux@gmail.com>,
	linux-pci@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Ionut Nechita <ionut_n2001@yahoo.com>
Subject: [RFC PATCH 3/3] PCI: Update bandwidth control and thermal cooling for Gen 7 (128 GT/s)
Date: Tue, 17 Feb 2026 10:01:02 +0200	[thread overview]
Message-ID: <20260217080102.206581-8-sunlightlinux@gmail.com> (raw)
In-Reply-To: <20260217080102.206581-2-sunlightlinux@gmail.com>

From: Ionut Nechita <ionut_n2001@yahoo.com>

Update PCIe subsystem components to support 128 GT/s link speed:

  - bwctrl: Extend pcie_valid_speed() range to PCIE_SPEED_128_0GT,
    add PCIE_SPEED_128_0GT to speed conversion table, widen
    supported_speeds variables from u8 to u16
  - portdrv: Switch hweight8() to hweight16() for supported_speeds
    to match the widened type
  - pcie_cooling: Add static_assert for PCIE_SPEED_128_0GT enum
    contiguity check

Signed-off-by: Ionut Nechita <ionut_n2001@yahoo.com>
---
 drivers/pci/pcie/bwctrl.c      | 7 ++++---
 drivers/pci/pcie/portdrv.c     | 2 +-
 drivers/thermal/pcie_cooling.c | 1 +
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c
index 36f939f23d34e..b9125b40cb860 100644
--- a/drivers/pci/pcie/bwctrl.c
+++ b/drivers/pci/pcie/bwctrl.c
@@ -50,7 +50,7 @@ static DECLARE_RWSEM(pcie_bwctrl_setspeed_rwsem);
 
 static bool pcie_valid_speed(enum pci_bus_speed speed)
 {
-	return (speed >= PCIE_SPEED_2_5GT) && (speed <= PCIE_SPEED_64_0GT);
+	return (speed >= PCIE_SPEED_2_5GT) && (speed <= PCIE_SPEED_128_0GT);
 }
 
 static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)
@@ -62,6 +62,7 @@ static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)
 		[PCIE_SPEED_16_0GT] = PCI_EXP_LNKCTL2_TLS_16_0GT,
 		[PCIE_SPEED_32_0GT] = PCI_EXP_LNKCTL2_TLS_32_0GT,
 		[PCIE_SPEED_64_0GT] = PCI_EXP_LNKCTL2_TLS_64_0GT,
+		[PCIE_SPEED_128_0GT] = PCI_EXP_LNKCTL2_TLS_128_0GT,
 	};
 
 	if (WARN_ON_ONCE(!pcie_valid_speed(speed)))
@@ -70,7 +71,7 @@ static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)
 	return speed_conv[speed];
 }
 
-static inline u16 pcie_supported_speeds2target_speed(u8 supported_speeds)
+static inline u16 pcie_supported_speeds2target_speed(u16 supported_speeds)
 {
 	return __fls(supported_speeds);
 }
@@ -88,7 +89,7 @@ static inline u16 pcie_supported_speeds2target_speed(u8 supported_speeds)
 static u16 pcie_bwctrl_select_speed(struct pci_dev *port, enum pci_bus_speed speed_req)
 {
 	struct pci_bus *bus = port->subordinate;
-	u8 desired_speeds, supported_speeds;
+	u16 desired_speeds, supported_speeds;
 	struct pci_dev *dev;
 
 	desired_speeds = GENMASK(pci_bus_speed2lnkctl2(speed_req),
diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index 38a41ccf79b9a..5ee8795107f26 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c
@@ -274,7 +274,7 @@ static int get_port_device_capability(struct pci_dev *dev)
 
 		pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap);
 		if (linkcap & PCI_EXP_LNKCAP_LBNC &&
-		    hweight8(dev->supported_speeds) > 1)
+		    hweight16(dev->supported_speeds) > 1)
 			services |= PCIE_PORT_SERVICE_BWCTRL;
 	}
 
diff --git a/drivers/thermal/pcie_cooling.c b/drivers/thermal/pcie_cooling.c
index a876d64f15827..9a2e39398674b 100644
--- a/drivers/thermal/pcie_cooling.c
+++ b/drivers/thermal/pcie_cooling.c
@@ -75,6 +75,7 @@ static_assert(PCIE_SPEED_5_0GT + 1 == PCIE_SPEED_8_0GT);
 static_assert(PCIE_SPEED_8_0GT + 1 == PCIE_SPEED_16_0GT);
 static_assert(PCIE_SPEED_16_0GT + 1 == PCIE_SPEED_32_0GT);
 static_assert(PCIE_SPEED_32_0GT + 1 == PCIE_SPEED_64_0GT);
+static_assert(PCIE_SPEED_64_0GT + 1 == PCIE_SPEED_128_0GT);
 
 MODULE_AUTHOR("Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>");
 MODULE_DESCRIPTION("PCIe cooling driver");
-- 
2.53.0


  parent reply	other threads:[~2026-02-17  8:01 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17  8:00 [RFC PATCH 0/3] PCI: Add PCIe Gen 7 (128 GT/s) speed support Ionut Nechita (Sunlight Linux)
2026-02-17  8:00 ` [RFC PATCH 1/3] PCI: Add PCIe Gen 7 (128 GT/s) register and speed definitions Ionut Nechita (Sunlight Linux)
2026-02-18 20:26   ` Ilpo Järvinen
2026-02-17  8:01 ` [RFC PATCH 2/3] PCI: Add PCIe Gen 7 (128 GT/s) speed detection and reporting Ionut Nechita (Sunlight Linux)
2026-02-18 21:05   ` Ilpo Järvinen
2026-02-17  8:01 ` Ionut Nechita (Sunlight Linux) [this message]
2026-02-18 21:08   ` [RFC PATCH 3/3] PCI: Update bandwidth control and thermal cooling for Gen 7 (128 GT/s) Ilpo Järvinen

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