Re: [PATCH v3 0/9] : pnv/phb4: Update PHB4 to the latest PHB5 spec

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Feb 10, 2026 at 07:40:50AM -0600, Saif Abrar wrote:
> Hello,
> 
> Addressing the review comments for the series v2:
> https://lists.gnu.org/archive/html/qemu-devel/2025-12/msg03768.html


breaks tsan build:


https://gitlab.com/mstredhat/qemu/-/jobs/13201554945

../hw/pci-host/pnv_phb4.c:968:9: error: expected expression
        PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);
        ^
../hw/pci-host/pnv_phb4.c:969:43: error: use of undeclared identifier 'pci'
        PCIDevice *pdev = pci_find_device(pci->bus, 0, 0);
                                          ^
../hw/pci-host/pnv_phb4.c:999:9: error: use of undeclared identifier 'pci'
        pci = PCI_HOST_BRIDGE(phb->phb_base);
        ^
../hw/pci-host/pnv_phb4.c:1000:32: error: use of undeclared identifier 'pci'
        pdev = pci_find_device(pci->bus, 0, 0);
                               ^
4 errors generated.


> This series updates the existing PHB4 model to the latest spec:
> "Power Systems Host Bridge 5 (PHB5) Functional Specification Version 0.5_00".
> 
> Updates include the following:
> - implemented sticky reset logic
> - implemented read-only, write-only, W1C and WxC logic
> - return all 1's on read to unimplemented registers
> - update PCIE registers for link status, speed and width
> - implement IODA PCT debug table without any functionality
> - update LSI Source-ID register based on small/big PHB number of interrupts
> 
> Also, a new testbench for PHB4 model is added that does XSCOM read/writes
> to various registers of interest and verifies the values.
> 
> Regards.
> 
> Saif Abrar (9):
>   qtest/phb4: Add testbench for PHB4
>   pnv/phb4: Add reset logic to PHB4
>   pnv/phb4: Implement sticky reset logic in PHB4
>   pnv/phb4: Implement read-only and write-only bits of registers
>   pnv/phb4: Implement write-clear and return 1's on unimplemented reg read
>   pnv/phb4: Set link-active status in HPSTAT and LMR registers
>   pnv/phb4: Set link speed and width in the DLP training control register
>   pnv/phb4: Implement IODA PCT table
>   pnv/phb4: Mask off LSI Source-ID based on number of interrupts
> 
>  hw/pci-host/pnv_phb.c               |   1 +
>  hw/pci-host/pnv_phb4.c              | 583 +++++++++++++++++++++++++---
>  include/hw/pci-host/pnv_phb4.h      |  16 +-
>  include/hw/pci-host/pnv_phb4_regs.h |  66 +++-
>  tests/qtest/meson.build             |   1 +
>  tests/qtest/pnv-phb4-test.c         | 228 +++++++++++
>  6 files changed, 837 insertions(+), 58 deletions(-)
>  create mode 100644 tests/qtest/pnv-phb4-test.c
> 
> -- 
> 2.47.3