diff for duplicates of <20260225012401.251459749@linuxfoundation.org> diff --git a/a/1.txt b/N1/1.txt index c6b226c..d75cbb6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,106 +1,51 @@ -6.19-stable review patch. If anyone has any objections, please let me know. +6.18-stable review patch. If anyone has any objections, please let me know. ------------------ -From: Leo Yan <leo.yan@arm.com> +From: Daniel Machon <daniel.machon@microchip.com> -[ Upstream commit 283182c1c239f6873d1a50e9e710c1a699f2256b ] +[ Upstream commit a49d2a2c37a6252c41cbdd505f9d1c58d5a3817a ] -When arm_spe_pmu_next_off() fails to calculate a valid limit, it returns -zero to indicate that tracing should not start. However, the caller -arm_spe_perf_aux_output_begin() does not propagate this failure by -updating hwc->state, cause the error to be silently ignored by upper -layers. +The max_adj field in ptp_clock_info tells userspace how much the PHC +clock frequency can be adjusted. ptp4l reads this and will never request +a correction larger than max_adj. -Because hwc->state remains zero after a failure, arm_spe_pmu_start() -continues to programs filter registers unnecessarily. The driver -still reports success to the perf core, so the core assumes the SPE -event was enabled and proceeds to enable other events. This breaks -event group semantics: SPE is already stopped while other events in the -same group are enabled. +On both sparx5 and lan969x the clock offset may never converge because +the servo needs a frequency correction larger than the current max_adj +of 200000 (200 ppm) allows. The servo rails at the max and the offset +stays in the tens of microseconds. -Fix this by updating arm_spe_perf_aux_output_begin() to return a status -code indicating success (0) or failure (-EIO). Both the interrupt -handler and arm_spe_pmu_start() check the return value and call -arm_spe_pmu_stop() to set PERF_HES_STOPPED in hwc->state. +The hardware has no inherent max adjustment limit; frequency correction +is done by writing a 64-bit clock period increment to CLK_PER_CFG, and +the register has plenty of range. The 200000 value was just an overly +conservative software limit. The max_adj is shared between sparx5 and +lan969x, and the increased value is safe for both. -In the interrupt handler, the period (e.g., period_left) needs to be -updated, so PERF_EF_UPDATE is passed to arm_spe_pmu_stop(). When the -error occurs during event start, the trace unit is not yet enabled, so -a flag '0' is used to drain buffer and update state only. +Fix this by increasing max_adj to 10000000 (10000 ppm), giving the +servo sufficient headroom. -Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension") -Signed-off-by: Leo Yan <leo.yan@arm.com> -Signed-off-by: Will Deacon <will@kernel.org> +Fixes: 0933bd04047c ("net: sparx5: Add support for ptp clocks") +Signed-off-by: Daniel Machon <daniel.machon@microchip.com> +Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> +Link: https://patch.msgid.link/20260212-sparx5-ptp-max-adj-v2-v1-1-06b200e50ce3@microchip.com +Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org> --- - drivers/perf/arm_spe_pmu.c | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c -index 4801115f2b540..5410fb7428d0e 100644 ---- a/drivers/perf/arm_spe_pmu.c -+++ b/drivers/perf/arm_spe_pmu.c -@@ -106,6 +106,8 @@ struct arm_spe_pmu { - /* Keep track of our dynamic hotplug state */ - static enum cpuhp_state arm_spe_pmu_online; - -+static void arm_spe_pmu_stop(struct perf_event *event, int flags); -+ - enum arm_spe_pmu_buf_fault_action { - SPE_PMU_BUF_FAULT_ACT_SPURIOUS, - SPE_PMU_BUF_FAULT_ACT_FATAL, -@@ -607,8 +609,8 @@ static u64 arm_spe_pmu_next_off(struct perf_output_handle *handle) - return limit; - } - --static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, -- struct perf_event *event) -+static int arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, -+ struct perf_event *event) - { - u64 base, limit; - struct arm_spe_pmu_buf *buf; -@@ -622,7 +624,6 @@ static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, - /* Start a new aux session */ - buf = perf_aux_output_begin(handle, event); - if (!buf) { -- event->hw.state |= PERF_HES_STOPPED; - /* - * We still need to clear the limit pointer, since the - * profiler might only be disabled by virtue of a fault. -@@ -642,6 +643,7 @@ static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle, - - out_write_limit: - write_sysreg_s(limit, SYS_PMBLIMITR_EL1); -+ return (limit & PMBLIMITR_EL1_E) ? 0 : -EIO; - } - - static void arm_spe_perf_aux_output_end(struct perf_output_handle *handle) -@@ -781,7 +783,10 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev) - * when we get to it. - */ - if (!(handle->aux_flags & PERF_AUX_FLAG_TRUNCATED)) { -- arm_spe_perf_aux_output_begin(handle, event); -+ if (arm_spe_perf_aux_output_begin(handle, event)) { -+ arm_spe_pmu_stop(event, PERF_EF_UPDATE); -+ break; -+ } - isb(); - } - break; -@@ -880,9 +885,10 @@ static void arm_spe_pmu_start(struct perf_event *event, int flags) - struct perf_output_handle *handle = this_cpu_ptr(spe_pmu->handle); - - hwc->state = 0; -- arm_spe_perf_aux_output_begin(handle, event); -- if (hwc->state) -+ if (arm_spe_perf_aux_output_begin(handle, event)) { -+ arm_spe_pmu_stop(event, 0); - return; -+ } - - reg = arm_spe_event_to_pmsfcr(event); - write_sysreg_s(reg, SYS_PMSFCR_EL1); + drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c +index 2f168700f63c1..8b2e07821a950 100644 +--- a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c ++++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c +@@ -576,7 +576,7 @@ static int sparx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) + static struct ptp_clock_info sparx5_ptp_clock_info = { + .owner = THIS_MODULE, + .name = "sparx5 ptp", +- .max_adj = 200000, ++ .max_adj = 10000000, + .gettime64 = sparx5_ptp_gettime64, + .settime64 = sparx5_ptp_settime64, + .adjtime = sparx5_ptp_adjtime, -- 2.51.0 diff --git a/a/content_digest b/N1/content_digest index 68f3a5a..dc86340 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,120 +1,66 @@ - "ref\020260225012359.695468795@linuxfoundation.org\0" + "ref\020260225012348.915798704@linuxfoundation.org\0" "From\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Subject\0[PATCH 6.19 063/781] perf: arm_spe: Properly set hw.state on failures\0" - "Date\0Tue, 24 Feb 2026 17:12:52 -0800\0" + "Subject\0[PATCH 6.18 525/641] net: sparx5/lan969x: fix PTP clock max_adj value\0" + "Date\0Tue, 24 Feb 2026 17:24:11 -0800\0" "To\0stable@vger.kernel.org\0" "Cc\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>" patches@lists.linux.dev - Leo Yan <leo.yan@arm.com> - Will Deacon <will@kernel.org> + Daniel Machon <daniel.machon@microchip.com> + Maxime Chevallier <maxime.chevallier@bootlin.com> + Jakub Kicinski <kuba@kernel.org> " Sasha Levin <sashal@kernel.org>\0" "\00:1\0" "b\0" - "6.19-stable review patch. If anyone has any objections, please let me know.\n" + "6.18-stable review patch. If anyone has any objections, please let me know.\n" "\n" "------------------\n" "\n" - "From: Leo Yan <leo.yan@arm.com>\n" + "From: Daniel Machon <daniel.machon@microchip.com>\n" "\n" - "[ Upstream commit 283182c1c239f6873d1a50e9e710c1a699f2256b ]\n" + "[ Upstream commit a49d2a2c37a6252c41cbdd505f9d1c58d5a3817a ]\n" "\n" - "When arm_spe_pmu_next_off() fails to calculate a valid limit, it returns\n" - "zero to indicate that tracing should not start. However, the caller\n" - "arm_spe_perf_aux_output_begin() does not propagate this failure by\n" - "updating hwc->state, cause the error to be silently ignored by upper\n" - "layers.\n" + "The max_adj field in ptp_clock_info tells userspace how much the PHC\n" + "clock frequency can be adjusted. ptp4l reads this and will never request\n" + "a correction larger than max_adj.\n" "\n" - "Because hwc->state remains zero after a failure, arm_spe_pmu_start()\n" - "continues to programs filter registers unnecessarily. The driver\n" - "still reports success to the perf core, so the core assumes the SPE\n" - "event was enabled and proceeds to enable other events. This breaks\n" - "event group semantics: SPE is already stopped while other events in the\n" - "same group are enabled.\n" + "On both sparx5 and lan969x the clock offset may never converge because\n" + "the servo needs a frequency correction larger than the current max_adj\n" + "of 200000 (200 ppm) allows. The servo rails at the max and the offset\n" + "stays in the tens of microseconds.\n" "\n" - "Fix this by updating arm_spe_perf_aux_output_begin() to return a status\n" - "code indicating success (0) or failure (-EIO). Both the interrupt\n" - "handler and arm_spe_pmu_start() check the return value and call\n" - "arm_spe_pmu_stop() to set PERF_HES_STOPPED in hwc->state.\n" + "The hardware has no inherent max adjustment limit; frequency correction\n" + "is done by writing a 64-bit clock period increment to CLK_PER_CFG, and\n" + "the register has plenty of range. The 200000 value was just an overly\n" + "conservative software limit. The max_adj is shared between sparx5 and\n" + "lan969x, and the increased value is safe for both.\n" "\n" - "In the interrupt handler, the period (e.g., period_left) needs to be\n" - "updated, so PERF_EF_UPDATE is passed to arm_spe_pmu_stop(). When the\n" - "error occurs during event start, the trace unit is not yet enabled, so\n" - "a flag '0' is used to drain buffer and update state only.\n" + "Fix this by increasing max_adj to 10000000 (10000 ppm), giving the\n" + "servo sufficient headroom.\n" "\n" - "Fixes: d5d9696b0380 (\"drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension\")\n" - "Signed-off-by: Leo Yan <leo.yan@arm.com>\n" - "Signed-off-by: Will Deacon <will@kernel.org>\n" + "Fixes: 0933bd04047c (\"net: sparx5: Add support for ptp clocks\")\n" + "Signed-off-by: Daniel Machon <daniel.machon@microchip.com>\n" + "Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>\n" + "Link: https://patch.msgid.link/20260212-sparx5-ptp-max-adj-v2-v1-1-06b200e50ce3@microchip.com\n" + "Signed-off-by: Jakub Kicinski <kuba@kernel.org>\n" "Signed-off-by: Sasha Levin <sashal@kernel.org>\n" "---\n" - " drivers/perf/arm_spe_pmu.c | 18 ++++++++++++------\n" - " 1 file changed, 12 insertions(+), 6 deletions(-)\n" + " drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c | 2 +-\n" + " 1 file changed, 1 insertion(+), 1 deletion(-)\n" "\n" - "diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c\n" - "index 4801115f2b540..5410fb7428d0e 100644\n" - "--- a/drivers/perf/arm_spe_pmu.c\n" - "+++ b/drivers/perf/arm_spe_pmu.c\n" - "@@ -106,6 +106,8 @@ struct arm_spe_pmu {\n" - " /* Keep track of our dynamic hotplug state */\n" - " static enum cpuhp_state arm_spe_pmu_online;\n" - " \n" - "+static void arm_spe_pmu_stop(struct perf_event *event, int flags);\n" - "+\n" - " enum arm_spe_pmu_buf_fault_action {\n" - " \tSPE_PMU_BUF_FAULT_ACT_SPURIOUS,\n" - " \tSPE_PMU_BUF_FAULT_ACT_FATAL,\n" - "@@ -607,8 +609,8 @@ static u64 arm_spe_pmu_next_off(struct perf_output_handle *handle)\n" - " \treturn limit;\n" - " }\n" - " \n" - "-static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle,\n" - "-\t\t\t\t\t struct perf_event *event)\n" - "+static int arm_spe_perf_aux_output_begin(struct perf_output_handle *handle,\n" - "+\t\t\t\t\t struct perf_event *event)\n" - " {\n" - " \tu64 base, limit;\n" - " \tstruct arm_spe_pmu_buf *buf;\n" - "@@ -622,7 +624,6 @@ static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle,\n" - " \t/* Start a new aux session */\n" - " \tbuf = perf_aux_output_begin(handle, event);\n" - " \tif (!buf) {\n" - "-\t\tevent->hw.state |= PERF_HES_STOPPED;\n" - " \t\t/*\n" - " \t\t * We still need to clear the limit pointer, since the\n" - " \t\t * profiler might only be disabled by virtue of a fault.\n" - "@@ -642,6 +643,7 @@ static void arm_spe_perf_aux_output_begin(struct perf_output_handle *handle,\n" - " \n" - " out_write_limit:\n" - " \twrite_sysreg_s(limit, SYS_PMBLIMITR_EL1);\n" - "+\treturn (limit & PMBLIMITR_EL1_E) ? 0 : -EIO;\n" - " }\n" - " \n" - " static void arm_spe_perf_aux_output_end(struct perf_output_handle *handle)\n" - "@@ -781,7 +783,10 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev)\n" - " \t\t * when we get to it.\n" - " \t\t */\n" - " \t\tif (!(handle->aux_flags & PERF_AUX_FLAG_TRUNCATED)) {\n" - "-\t\t\tarm_spe_perf_aux_output_begin(handle, event);\n" - "+\t\t\tif (arm_spe_perf_aux_output_begin(handle, event)) {\n" - "+\t\t\t\tarm_spe_pmu_stop(event, PERF_EF_UPDATE);\n" - "+\t\t\t\tbreak;\n" - "+\t\t\t}\n" - " \t\t\tisb();\n" - " \t\t}\n" - " \t\tbreak;\n" - "@@ -880,9 +885,10 @@ static void arm_spe_pmu_start(struct perf_event *event, int flags)\n" - " \tstruct perf_output_handle *handle = this_cpu_ptr(spe_pmu->handle);\n" - " \n" - " \thwc->state = 0;\n" - "-\tarm_spe_perf_aux_output_begin(handle, event);\n" - "-\tif (hwc->state)\n" - "+\tif (arm_spe_perf_aux_output_begin(handle, event)) {\n" - "+\t\tarm_spe_pmu_stop(event, 0);\n" - " \t\treturn;\n" - "+\t}\n" - " \n" - " \treg = arm_spe_event_to_pmsfcr(event);\n" - " \twrite_sysreg_s(reg, SYS_PMSFCR_EL1);\n" + "diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c\n" + "index 2f168700f63c1..8b2e07821a950 100644\n" + "--- a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c\n" + "+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c\n" + "@@ -576,7 +576,7 @@ static int sparx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)\n" + " static struct ptp_clock_info sparx5_ptp_clock_info = {\n" + " \t.owner\t\t= THIS_MODULE,\n" + " \t.name\t\t= \"sparx5 ptp\",\n" + "-\t.max_adj\t= 200000,\n" + "+\t.max_adj\t= 10000000,\n" + " \t.gettime64\t= sparx5_ptp_gettime64,\n" + " \t.settime64\t= sparx5_ptp_settime64,\n" + " \t.adjtime\t= sparx5_ptp_adjtime,\n" "-- \n" 2.51.0 -31eb2095432a6e23eaf680e883f83323439ede9aa63f76026e9430becb992edd +7e0cbc0e9f8c69421ac4ed5b9966375fc7135d0a5294f94a5502276c72591fd1
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