[PATCH v3 00/32] hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3

[Shameer Kolothum <skolothumtho@nvidia.com>]

Hi,

Changes from v2:
 https://lore.kernel.org/qemu-devel/20260206144823.80655-1-skolothumtho@nvidia.com/

  - Addressed feedback on v2 and picked up R-by tags. Thanks!
  - Renamed the property from "tegra241-cmdqv" to a generic OnOffAuto
    "cmdqv".
  - Introduced a probe() callback to detect and initialize CMDQV
    support during device attach (patch #7).
  - Since CMDQV initialization is now deferred to device attach time,
    added a helper to link any unmapped MMIO/IRQ resources (patch #12).
  - Moved VINTF enable handling to the CONFIG ENABLE bit write path
    instead of any read/write access path (patch #17). Hopefully this
    won't break any corner cases.
  - Added checks for VINTF and CMDQV ENABLE bits before allocating
    vCMDQ HW queues, and free any allocated resources if disabled
    (patch #19).
  - Introduced a common helper for vEVENTQ read and validation
    (patch #23).
  - Updated bios-tables test IORT blobs for SMMUv3 device identifier
    changes (patch #29).
  - Rebasing on top of Philippe's CONFIG_DEVICES cleanup series [0],
    using tegra241-cmdqv-stubs.c (patch #6).

Please find the complete branch here:
https://github.com/shamiali2008/qemu-master/tree/master-veventq-v8-vcmdq-v3

I have sanity tested this on an NVIDIA GRACE platform and will
continue with additional tests.

Feedback and testing are very welcome.

Thanks,
Shameer
[0] https://lore.kernel.org/qemu-devel/20260225031658.32095-1-philmd@linaro.org/

---
Background(from RFCv1):
https://lore.kernel.org/qemu-devel/20251210133737.78257-1-skolothumtho@nvidia.com/

Thanks to Nicolin for the initial patches and testing on which this
is based.

Tegra241 CMDQV extends SMMUv3 by allocating per-VM "virtual interfaces"
(VINTFs), each hosting up to 128 VCMDQs.

Each VINTF exposes two 64KB MMIO pages:
 - Page0 – guest owned control and status registers (directly mapped
           into the VM)
 - Page1 – queue configuration registers (trapped/emulated by QEMU)

Unlike the standard SMMU CMDQ, a guest owned Tegra241 VCMDQ does not
support the full command set. Only a subset, primarily invalidation
related commands, is accepted by the CMDQV hardware. For this reason,
a distinct CMDQV device must be exposed to the guest, and the guest OS
must include a Tegra241 CMDQV aware driver to take advantage of the
hardware acceleration.

VCMDQ support is integrated via the IOMMU_HW_QUEUE_ALLOC mechanism,
allowing QEMU to attach guest configured VCMDQ buffers to the
underlying CMDQV hardware through IOMMUFD. The Linux kernel already
supports the full CMDQV virtualisation model via IOMMUFD[0].

---

Nicolin Chen (15):
  backends/iommufd: Update iommufd_backend_get_device_info
  backends/iommufd: Update iommufd_backend_alloc_viommu to allow user
    ptr
  backends/iommufd: Introduce iommufd_backend_alloc_hw_queue
  backends/iommufd: Introduce iommufd_backend_viommu_mmap
  hw/arm/tegra241-cmdqv: Implement CMDQV init
  hw/arm/tegra241-cmdqv: Implement CMDQV vIOMMU alloc/free
  hw/arm/tegra241-cmdqv: Emulate global CMDQV registers
  hw/arm/tegra241-cmdqv: Emulate global and VINTF VCMDQ register reads
  hw/arm/tegra241-cmdqv: Emulate global and VINTF VCMDQ register writes
  hw/arm/tegra241-cmdqv: mmap VINTF Page0 for CMDQV
  hw/arm/tegra241-cmdqv: Allocate HW VCMDQs on base register programming
  hw/arm/tegra241-cmdqv: Map VINTF page0 into guest MMIO space
  hw/arm/tegra241-cmdqv: Add reset handler
  hw/arm/tegra241-cmdqv: Limit queue size based on backend page size
  hw/arm/virt-acpi: Advertise Tegra241 CMDQV nodes in DSDT

Shameer Kolothum (17):
  hw/arm/smmuv3-accel: Introduce CMDQV ops interface
  hw/arm/tegra241-cmdqv: Add Tegra241 CMDQV ops backend stub
  hw/arm/smmuv3-accel: Wire CMDQV ops into accel lifecycle
  hw/arm/virt: Store SMMUv3 device objects in VirtMachineState.
  hw/arm/virt-acpi-build: Use stored SMMUv3 devices for IORT build
  hw/arm/tegra241-cmdqv: Probe host Tegra241 CMDQV support
  hw/arm/virt: Link SMMUv3 CMDQV resources to platform bus
  system/physmem: Add address_space_is_ram() helper
  hw/arm/tegra241-cmdqv: Use mmap'ed VINTF page0 as VCMDQ backing
  hw/arm/tegra241-cmdqv: Add vEVENTQ allocation and free
  hw/arm/smmuv3-accel: Introduce common helper for veventq read
  hw/arm/tegra241-cmdqv: Read and propagate Tegra241 CMDQV errors
  tests/qtest/bios-tables-test: Prepare for IORT SMMUv3 node identifier
    change
  hw/arm/smmuv3: Add per-device identifier property
  tests/qtest/bios-tables-test: Update IORT blobs for SMMUv3 identifier
    change
  hw/arm/smmuv3-accel: Introduce helper to query CMDQV type
  hw/arm/smmuv3: Add cmdqv property for SMMUv3 device

 hw/arm/smmuv3-accel.h                         |  29 +
 hw/arm/tegra241-cmdqv.h                       | 342 ++++++++
 include/hw/arm/smmuv3.h                       |   3 +
 include/hw/arm/virt.h                         |   1 +
 include/system/iommufd.h                      |  16 +
 include/system/memory.h                       |  10 +
 backends/iommufd.c                            |  64 ++
 hw/arm/smmuv3-accel-stubs.c                   |  11 +
 hw/arm/smmuv3-accel.c                         | 196 ++++-
 hw/arm/smmuv3.c                               |   9 +
 hw/arm/tegra241-cmdqv-stubs.c                 |  18 +
 hw/arm/tegra241-cmdqv.c                       | 793 ++++++++++++++++++
 hw/arm/virt-acpi-build.c                      | 126 ++-
 hw/arm/virt.c                                 |  27 +
 hw/vfio/iommufd.c                             |   4 +-
 system/physmem.c                              |  11 +
 backends/trace-events                         |   4 +-
 hw/arm/Kconfig                                |   5 +
 hw/arm/meson.build                            |   2 +
 hw/arm/trace-events                           |   5 +
 tests/data/acpi/aarch64/virt/IORT.its_off     | Bin 172 -> 172 bytes
 tests/data/acpi/aarch64/virt/IORT.msi_gicv2m  | Bin 172 -> 172 bytes
 tests/data/acpi/aarch64/virt/IORT.smmuv3-dev  | Bin 260 -> 260 bytes
 .../data/acpi/aarch64/virt/IORT.smmuv3-legacy | Bin 192 -> 192 bytes
 24 files changed, 1596 insertions(+), 80 deletions(-)
 create mode 100644 hw/arm/tegra241-cmdqv.h
 create mode 100644 hw/arm/tegra241-cmdqv-stubs.c
 create mode 100644 hw/arm/tegra241-cmdqv.c

-- 
2.43.0