From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Matthew Brost" <matthew.brost@intel.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Simona Vetter" <simona.vetter@ffwll.ch>,
"Dave Airlie" <airlied@gmail.com>,
"Alistair Popple" <apopple@nvidia.com>,
dri-devel@lists.freedesktop.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Christian König" <christian.koenig@amd.com>
Subject: [PATCH v3 0/4] Two-pass MMU interval notifiers
Date: Tue, 3 Mar 2026 14:34:05 +0100 [thread overview]
Message-ID: <20260303133409.11609-1-thomas.hellstrom@linux.intel.com> (raw)
GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.
With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete.
This also applies in non-recoverable page-fault scenarios to
starting a preemption requests on GPUs and waiting for the GPUs
to preempt so that system pages they access can be reclaimed.
One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for two-pass in the core appears like the right choice.
So this series does that, with pach 1 implementing the core support
and also describes the choices made.
The rest of the patches implements a POC with xeKMD userptr
invalidation and potential TLB-flushing. A follow-up series
will extend to drm_gpusvm.
v2 hightlights:
- Refactor the core mm patch to use the struct
mmu_interval_notifier_ops for the invalidate_finish() callback.
- Rebase on xe driver tlb invalidation changes.
- Provide an initial implementation for userptr instead of drm_gpusvm.
The intent is to handle drm_gpusvm in a follow-up series.
v3:
- Address review comments from Matt Brost: Code formatting,
documentation, additional asserts and removal of
unnecessary waits, as specified in each patch.
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>
Thomas Hellström (4):
mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers
drm/xe/userptr: Convert invalidation to two-pass MMU notifier
drm/xe: Split TLB invalidation into submit and wait steps
drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass
if possible
drivers/gpu/drm/xe/xe_svm.c | 8 +-
drivers/gpu/drm/xe/xe_tlb_inval.c | 84 +++++++++++++
drivers/gpu/drm/xe/xe_tlb_inval.h | 6 +
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 14 +++
drivers/gpu/drm/xe/xe_userptr.c | 155 ++++++++++++++++++++----
drivers/gpu/drm/xe/xe_userptr.h | 31 ++++-
drivers/gpu/drm/xe/xe_vm.c | 99 +++++----------
drivers/gpu/drm/xe/xe_vm.h | 5 +-
drivers/gpu/drm/xe/xe_vm_madvise.c | 10 +-
drivers/gpu/drm/xe/xe_vm_types.h | 1 +
include/linux/mmu_notifier.h | 38 ++++++
mm/mmu_notifier.c | 65 ++++++++--
12 files changed, 412 insertions(+), 104 deletions(-)
--
2.53.0
next reply other threads:[~2026-03-03 13:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-03 13:34 Thomas Hellström [this message]
2026-03-03 13:34 ` [PATCH v3 1/4] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers Thomas Hellström
2026-03-04 19:32 ` David Hildenbrand (Arm)
2026-03-04 20:06 ` Thomas Hellström
2026-03-04 19:45 ` David Hildenbrand (Arm)
2026-03-05 9:41 ` Thomas Hellström
2026-03-03 13:34 ` [PATCH v3 2/4] drm/xe/userptr: Convert invalidation to two-pass MMU notifier Thomas Hellström
2026-03-03 18:10 ` Matthew Brost
2026-03-03 13:34 ` [PATCH v3 3/4] drm/xe: Split TLB invalidation into submit and wait steps Thomas Hellström
2026-03-03 18:13 ` Matthew Brost
2026-03-03 13:34 ` [PATCH v3 4/4] drm/xe/userptr: Defer Waiting for TLB invalidation to the second pass if possible Thomas Hellström
2026-03-03 23:04 ` Matthew Brost
2026-03-03 15:25 ` ✗ CI.checkpatch: warning for Two-pass MMU interval notifiers (rev3) Patchwork
2026-03-03 15:26 ` ✓ CI.KUnit: success " Patchwork
2026-03-03 16:07 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-04 3:20 ` ✗ Xe.CI.FULL: failure " Patchwork
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