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Wed, 04 Mar 2026 03:22:54 -0800 (PST) X-Received: by 2002:a05:600c:8b53:b0:483:4807:210c with SMTP id 5b1f17b1804b1-48519895593mr25699085e9.24.1772623373924; Wed, 04 Mar 2026 03:22:53 -0800 (PST) Received: from imammedo ([213.175.46.86]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4851a8aaa20sm17443995e9.2.2026.03.04.03.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Mar 2026 03:22:53 -0800 (PST) Date: Wed, 4 Mar 2026 12:22:51 +0100 From: Igor Mammedov To: Mark Cave-Ayland Cc: mst@redhat.com, anisinha@redhat.com, pbonzini@redhat.com, marcandre.lureau@redhat.com, marcel.apfelbaum@gmail.com, qemu-devel@nongnu.org Subject: Re: [PATCH 4/5] hw/char/serial-isa.c: declare IRQ as shared in ACPI IRQ descriptor Message-ID: <20260304122251.217cd93b@imammedo> In-Reply-To: <20260227134611.1229390-5-mark.caveayland@nutanix.com> References: <20260227134611.1229390-1-mark.caveayland@nutanix.com> <20260227134611.1229390-5-mark.caveayland@nutanix.com> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.51; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.322, RCVD_IN_VALIDITY_SAFE_BLOCKED=1.141, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, 27 Feb 2026 13:44:58 +0000 Mark Cave-Ayland wrote: > From Windows 8.1 onwards ISA serial IRQs cannot be shared when ACPI Revision > 5.0 is used in the FACP table. The reason for this is that if a 2-byte IRQ > Descriptor is used then the interrupt is considered to be high true, edge > sensitive, non-shareable. Since legacy serial ports COM1/3 and COM2/4 share > an IRQ then if more than 2 serial ports are added, Windows indicates a > conflict in Device Manager and these combinations cannot be used together. > > Add a new 3-byte IRQ Descriptor to the _CRS resource indicating that the > ISA serial IRQ is low true, edge sensitive and shareable, along with a > corresponding _PRS resource so that the legacy serial ports also appear > at a fixed address. This enables all 4 legacy serial ports to be used in > Windows without conflict. What happens if we just replace aml_irq_no_flags() with aml_irq() (without compat knob and _PRS) wrt _PRS could you elaborate some more why it's needed and what happens if it doesn't exists? > > Finally add a new x-acpi-shared-irq property to disable the ACPI IRQ descriptor > changes for older PC machine types, and add it to the pc_compat_10_2[] array. > > Signed-off-by: Mark Cave-Ayland > --- > hw/char/serial-isa.c | 23 ++++++++++++++++++++++- > hw/i386/pc.c | 4 +++- > 2 files changed, 25 insertions(+), 2 deletions(-) > > diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c > index a4be0492c5..1662da86bd 100644 > --- a/hw/char/serial-isa.c > +++ b/hw/char/serial-isa.c > @@ -28,6 +28,7 @@ > #include "qemu/module.h" > #include "system/system.h" > #include "hw/acpi/acpi_aml_interface.h" > +#include "hw/acpi/aml-build.h" > #include "hw/char/serial.h" > #include "hw/char/serial-isa.h" > #include "hw/isa/isa.h" > @@ -43,6 +44,7 @@ struct ISASerialState { > uint32_t index; > uint32_t iobase; > uint32_t isairq; > + bool acpi_shared_irq; > SerialState state; > }; > > @@ -92,7 +94,12 @@ static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) > > crs = aml_resource_template(); > aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08)); > - aml_append(crs, aml_irq_no_flags(isa->isairq)); > + if (isa->acpi_shared_irq) { > + aml_append(crs, aml_irq(isa->isairq, AML_EDGE, AML_ACTIVE_LOW, > + AML_SHARED)); > + } else { > + aml_append(crs, aml_irq_no_flags(isa->isairq)); > + } > > dev = aml_device("COM%d", isa->index + 1); > aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501"))); > @@ -100,6 +107,18 @@ static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) > aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); > aml_append(dev, aml_name_decl("_CRS", crs)); > > + if (isa->acpi_shared_irq) { > + Aml *prs = aml_resource_template(); > + > + aml_append(prs, aml_start_dependent_function(0, 0)); > + aml_append(prs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, > + 0x08)); > + aml_append(prs, aml_irq(isa->isairq, AML_EDGE, AML_ACTIVE_LOW, > + AML_SHARED)); > + aml_append(prs, aml_end_dependent_function()); > + aml_append(dev, aml_name_decl("_PRS", prs)); > + } > + > aml_append(scope, dev); > } > > @@ -117,6 +136,8 @@ static const Property serial_isa_properties[] = { > DEFINE_PROP_UINT32("index", ISASerialState, index, -1), > DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), > DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), > + DEFINE_PROP_BOOL("x-acpi-shared-irq", ISASerialState, acpi_shared_irq, > + true), > }; > > static void serial_isa_class_initfn(ObjectClass *klass, const void *data) > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 0dd3fd01d9..c0335b05ba 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -82,7 +82,9 @@ > { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ > { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, > > -GlobalProperty pc_compat_10_2[] = {}; > +GlobalProperty pc_compat_10_2[] = { > + { "isa-serial", "x-acpi-shared-irq", "false" }, > +}; > const size_t pc_compat_10_2_len = G_N_ELEMENTS(pc_compat_10_2); > > GlobalProperty pc_compat_10_1[] = {