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X-CSE-ConnectionGUID: k+iYOLUhTg2bhm4U0U6omA== X-CSE-MsgGUID: x4JASR1+T1iI5KbmkI10dw== X-IronPort-AV: E=McAfee;i="6800,10657,11722"; a="73892328" X-IronPort-AV: E=Sophos;i="6.23,108,1770624000"; d="scan'208";a="73892328" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2026 06:46:36 -0700 X-CSE-ConnectionGUID: Q+qJnUScT0SKAVNsXpi6iQ== X-CSE-MsgGUID: 83tYA8dSR6GbDF1JFMpjYA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,108,1770624000"; d="scan'208";a="223601694" Received: from lkp-server01.sh.intel.com (HELO 058beb05654c) ([10.239.97.150]) by orviesa003.jf.intel.com with ESMTP; 08 Mar 2026 06:46:35 -0700 Received: from kbuild by 058beb05654c with local (Exim 4.98.2) (envelope-from ) id 1vzESm-0000000039Y-3yCZ; Sun, 08 Mar 2026 13:46:32 +0000 Date: Sun, 8 Mar 2026 21:46:19 +0800 From: kernel test robot To: Brian Masney Cc: oe-kbuild-all@lists.linux.dev Subject: Re: [PATCH RFC v5 2/4] clk: test: introduce test suite for sibling rate changes on a divider Message-ID: <202603082131.EH1YuBck-lkp@intel.com> References: <20260306-clk-scaling-v5-2-d21b84ee6f27@redhat.com> Precedence: bulk X-Mailing-List: oe-kbuild-all@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260306-clk-scaling-v5-2-d21b84ee6f27@redhat.com> Hi Brian, [This is a private test report for your RFC patch.] kernel test robot noticed the following build errors: [auto build test ERROR on fc7b1a72c6cd5cbbd989c6c32a6486e3e4e3594d] url: https://github.com/intel-lab-lkp/linux/commits/Brian-Masney/clk-test-introduce-clk_dummy_div-for-a-mock-divider/20260307-074328 base: fc7b1a72c6cd5cbbd989c6c32a6486e3e4e3594d patch link: https://lore.kernel.org/r/20260306-clk-scaling-v5-2-d21b84ee6f27%40redhat.com patch subject: [PATCH RFC v5 2/4] clk: test: introduce test suite for sibling rate changes on a divider config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20260308/202603082131.EH1YuBck-lkp@intel.com/config) compiler: alpha-linux-gcc (GCC) 15.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260308/202603082131.EH1YuBck-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202603082131.EH1YuBck-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/clk/clk_test.c: In function 'clk_rate_change_sibling_div_div_test_init': >> drivers/clk/clk_test.c:686:33: error: 'HZ_PER_MHZ' undeclared (first use in this function) 686 | ctx->parent.rate = 24 * HZ_PER_MHZ; | ^~~~~~~~~~ drivers/clk/clk_test.c:686:33: note: each undeclared identifier is reported only once for each function it appears in drivers/clk/clk_test.c: In function 'clk_test_rate_change_sibling_div_div_1': drivers/clk/clk_test.c:735:49: error: 'HZ_PER_MHZ' undeclared (first use in this function) 735 | ret = clk_set_rate(ctx->child1_clk, 6 * HZ_PER_MHZ); | ^~~~~~~~~~ drivers/clk/clk_test.c: In function 'clk_test_rate_change_sibling_div_div_2': drivers/clk/clk_test.c:756:50: error: 'HZ_PER_MHZ' undeclared (first use in this function) 756 | ret = clk_set_rate(ctx->child1_clk, 48 * HZ_PER_MHZ); | ^~~~~~~~~~ drivers/clk/clk_test.c: In function 'clk_test_rate_change_sibling_div_div_3': drivers/clk/clk_test.c:783:50: error: 'HZ_PER_MHZ' undeclared (first use in this function) 783 | ret = clk_set_rate(ctx->child1_clk, 32 * HZ_PER_MHZ); | ^~~~~~~~~~ vim +/HZ_PER_MHZ +686 drivers/clk/clk_test.c 670 671 KUNIT_ARRAY_PARAM_DESC(clk_rate_change_sibling_div_div_test_regular_ops, 672 clk_rate_change_sibling_div_div_test_regular_ops_params, desc) 673 674 static int clk_rate_change_sibling_div_div_test_init(struct kunit *test) 675 { 676 const struct clk_rate_change_sibling_div_div_test_param *param = test->param_value; 677 struct clk_rate_change_sibling_div_div_context *ctx; 678 int ret; 679 680 ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); 681 if (!ctx) 682 return -ENOMEM; 683 test->priv = ctx; 684 685 ctx->parent.hw.init = CLK_HW_INIT_NO_PARENT("parent", &clk_dummy_rate_ops, 0); > 686 ctx->parent.rate = 24 * HZ_PER_MHZ; 687 ret = clk_hw_register_kunit(test, NULL, &ctx->parent.hw); 688 if (ret) 689 return ret; 690 691 ctx->child1.hw.init = CLK_HW_INIT_HW("child1", &ctx->parent.hw, 692 param->ops, CLK_SET_RATE_PARENT); 693 ctx->child1.div = 1; 694 ret = clk_hw_register_kunit(test, NULL, &ctx->child1.hw); 695 if (ret) 696 return ret; 697 698 ctx->child2.hw.init = CLK_HW_INIT_HW("child2", &ctx->parent.hw, 699 param->ops, CLK_SET_RATE_PARENT); 700 ctx->child2.div = 1; 701 ret = clk_hw_register_kunit(test, NULL, &ctx->child2.hw); 702 if (ret) 703 return ret; 704 705 ctx->parent_clk = clk_hw_get_clk(&ctx->parent.hw, NULL); 706 ctx->child1_clk = clk_hw_get_clk(&ctx->child1.hw, NULL); 707 ctx->child2_clk = clk_hw_get_clk(&ctx->child2.hw, NULL); 708 709 KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->parent_clk), 24 * HZ_PER_MHZ); 710 KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), 24 * HZ_PER_MHZ); 711 KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), 24 * HZ_PER_MHZ); 712 713 return 0; 714 } 715 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki