[PATCH 09/15] hw/alpha: Convert IRQ pointers to named GPIOs

[Yodel Eldar <yodel.eldar@yodel.dev>]

Eliminate the qemu_irq parameters of typhoon_init() by using
qdev_init_gpio_in_named() for the IRQ lines.

Replace the qemu_irq variables in clipper_init() by calling
qdev_get_gpio_in_named() in their place.

Signed-off-by: Yodel Eldar <yodel.eldar@yodel.dev>
---
 hw/alpha/alpha_sys.h |  5 ++++-
 hw/alpha/dp264.c     | 12 +++++++-----
 hw/alpha/typhoon.c   | 11 ++++++-----
 3 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index f6779520d9..39a96760d7 100644
--- a/hw/alpha/alpha_sys.h
+++ b/hw/alpha/alpha_sys.h
@@ -11,9 +11,12 @@
 #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost"
 OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE)
 
-PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *,
+PCIBus *typhoon_init(MemoryRegion *,
                      pci_map_irq_fn, uint8_t devfn_min, TyphoonState *);
 
+#define TYPHOON_GPIO_ISA_IRQ "isa-irq"
+#define TYPHOON_GPIO_RTC_IRQ "rtc-irq"
+
 /* alpha_pci.c.  */
 extern const MemoryRegionOps alpha_pci_ignore_ops;
 extern const MemoryRegionOps alpha_pci_conf1_ops;
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index c0996efffe..61eeaef6db 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -66,8 +66,6 @@ static void clipper_init(MachineState *machine)
     PCIDevice *pci_dev;
     DeviceState *i82378_dev;
     ISABus *isa_bus;
-    qemu_irq rtc_irq;
-    qemu_irq isa_irq;
     long size, i;
     char *palcode_filename;
     uint64_t palcode_entry;
@@ -108,7 +106,7 @@ static void clipper_init(MachineState *machine)
      * Init the chipset.  Because we're using CLIPPER IRQ mappings,
      * the minimum PCI device IdSel is 1.
      */
-    pci_bus = typhoon_init(machine->ram, &isa_irq, &rtc_irq,
+    pci_bus = typhoon_init(machine->ram,
                            clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon);
 
     /*
@@ -136,10 +134,14 @@ static void clipper_init(MachineState *machine)
     isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
 
     /* Connect the ISA PIC to the Typhoon IRQ used for ISA interrupts. */
-    qdev_connect_gpio_out(i82378_dev, 0, isa_irq);
+    qdev_connect_gpio_out(i82378_dev, 0,
+                          qdev_get_gpio_in_named(DEVICE(typhoon),
+                                                 TYPHOON_GPIO_ISA_IRQ, 0));
 
     /* Since we have an SRM-compatible PALcode, use the SRM epoch.  */
-    mc146818_rtc_init(isa_bus, 1900, rtc_irq);
+    mc146818_rtc_init(isa_bus, 1900,
+                      qdev_get_gpio_in_named(DEVICE(typhoon),
+                                             TYPHOON_GPIO_RTC_IRQ, 0));
 
     /* VGA setup.  Don't bother loading the bios.  */
     pci_vga_init(pci_bus);
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 5fac5eba1c..03bb4c8055 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -831,8 +831,7 @@ static void typhoon_alarm_timer(void *opaque)
     cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER);
 }
 
-PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
-                     qemu_irq *p_rtc_irq,
+PCIBus *typhoon_init(MemoryRegion *ram,
                      pci_map_irq_fn sys_map_irq, uint8_t devfn_min,
                      TyphoonState *s)
 {
@@ -857,9 +856,6 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
         }
     }
 
-    *p_isa_irq = qemu_allocate_irq(typhoon_set_isa_irq, s, 0);
-    *p_rtc_irq = qemu_allocate_irq(typhoon_set_timer_irq, s, 0);
-
     /*
      * Main memory region, 0x00.0000.0000.  Real hardware supports 32GB,
      * but the address space hole reserved at this point is 8TB.
@@ -945,6 +941,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
 static void typhoon_pcihost_init(Object *obj)
 {
     TyphoonState *s = TYPHOON_PCI_HOST_BRIDGE(obj);
+    DeviceState *dev = DEVICE(obj);
 
     int i;
     for (i = 0; i < 4; ++i) {
@@ -953,6 +950,10 @@ static void typhoon_pcihost_init(Object *obj)
                                  (Object **)&s->cchip.cpu[i],
                                  qdev_prop_allow_set_link_before_realize, 0);
     }
+
+    qdev_init_gpio_in_named(dev, typhoon_set_isa_irq, TYPHOON_GPIO_ISA_IRQ, 1);
+    qdev_init_gpio_in_named(dev, typhoon_set_timer_irq, TYPHOON_GPIO_RTC_IRQ,
+                            1);
 }
 
 static void typhoon_pcihost_class_init(ObjectClass *klass, const void *data)

-- 
2.53.0