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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Deborah Brouwer <deborah.brouwer@collabora.com>
Cc: dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Daniel Almeida" <daniel.almeida@collabora.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Miguel Ojeda" <ojeda@kernel.org>, "Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Trevor Gross" <tmgross@umich.edu>,
	"Steven Price" <steven.price@arm.com>,
	"Dirk Behme" <dirk.behme@gmail.com>,
	"Alexandre Courbot" <acourbot@nvidia.com>,
	"Boqun Feng" <boqun@kernel.org>
Subject: Re: [PATCH v2 2/5] drm/tyr: Set interconnect coherency during probe
Date: Thu, 12 Mar 2026 10:07:03 +0100	[thread overview]
Message-ID: <20260312100703.7984c5f1@fedora> (raw)
In-Reply-To: <20260311-b4-tyr-use-register-macro-v2-v2-2-b936d9eb8f51@collabora.com>

On Wed, 11 Mar 2026 16:03:59 -0700
Deborah Brouwer <deborah.brouwer@collabora.com> wrote:

> Currently GpuInfo reports the interconnect coherency protocol as none
> without actually reading the `COHERENCY_ENABLE` register.
> 
> Although the result is the same, write `NO_COHERENCY` to the register
> during probe and then read back the register to populate the GpuInfo
> struct.
> 
> This ensures that GpuInfo is populated consistently and is always as
> accurate as possible by reporting the register values directly.
> 
> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com>
> ---
>  drivers/gpu/drm/tyr/driver.rs | 6 ++++++
>  drivers/gpu/drm/tyr/gpu.rs    | 2 +-
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs
> index 10c212a3a01910858f02c6d637edff8a263f017b..b2147c305bacf081caf028866811b902cf7b9182 100644
> --- a/drivers/gpu/drm/tyr/driver.rs
> +++ b/drivers/gpu/drm/tyr/driver.rs
> @@ -138,6 +138,12 @@ fn probe(
>          issue_soft_reset(pdev.as_ref(), &iomem)?;
>          gpu::l2_power_on(pdev.as_ref(), &iomem)?;
>  
> +        let io = (*iomem).access(pdev.as_ref())?;
> +        io.write_val(
> +            COHERENCY_ENABLE::zeroed()
> +                .with_const_l2_cache_protocol_select::<{ COHERENCY_ENABLE::NO_COHERENCY }>(),
> +        );

If we want to do it right from the start, we should do what Panthor
does: check if the device is IO coherent (device_get_dma_attr()), and
set the protocol based on that. Given device_get_dma_attr() is not
currently exposed by the rust Device abstraction, I guess we can force
it to NO_COHERENCY, but I'd add a

	// FIXME: This needs to be set properly once we get
	// device_get_dma_attr() properly exposed to the rust drivers.
	

> +
>          let gpu_info = GpuInfo::new(pdev.as_ref(), &iomem)?;
>          gpu_info_log(pdev.as_ref(), &iomem)?;
>  
> diff --git a/drivers/gpu/drm/tyr/gpu.rs b/drivers/gpu/drm/tyr/gpu.rs
> index 51a250570f375e12bb0f7fb32f047bf219ef9b70..9f572ccffd11a7ea1872a1e4e1c88f78fd6cad29 100644
> --- a/drivers/gpu/drm/tyr/gpu.rs
> +++ b/drivers/gpu/drm/tyr/gpu.rs
> @@ -55,7 +55,7 @@ pub(crate) fn new(dev: &Device<Bound>, iomem: &Devres<IoMem>) -> Result<Self> {
>              // TODO: Add texture_features_{1,2,3}.
>              texture_features: [io.read(TEXTURE_FEATURES_0).into_raw(), 0, 0, 0],
>              as_present: io.read(AS_PRESENT).into_raw(),
> -            selected_coherency: uapi::drm_panthor_gpu_coherency_DRM_PANTHOR_GPU_COHERENCY_NONE,
> +            selected_coherency: io.read(COHERENCY_ENABLE).into_raw(),
>              shader_present: io.read(SHADER_PRESENT).into_raw(),
>              l2_present: io.read(L2_PRESENT).into_raw(),
>              tiler_present: io.read(TILER_PRESENT).into_raw(),
> 


  reply	other threads:[~2026-03-12  9:07 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-11 23:03 [PATCH v2 0/5] drm/tyr: Use register! macro Deborah Brouwer
2026-03-11 23:03 ` [PATCH v2 1/5] drm/tyr: Use register! macro for GPU_CONTROL Deborah Brouwer
2026-03-12  8:39   ` Boris Brezillon
2026-03-12 13:25     ` Alexandre Courbot
2026-03-13 18:29     ` Daniel Almeida
2026-03-13 19:13       ` Deborah Brouwer
2026-03-12  9:14   ` Boris Brezillon
2026-03-13 18:26   ` Daniel Almeida
2026-03-18  3:14   ` Alexandre Courbot
2026-03-20  0:15     ` Deborah Brouwer
2026-03-11 23:03 ` [PATCH v2 2/5] drm/tyr: Set interconnect coherency during probe Deborah Brouwer
2026-03-12  9:07   ` Boris Brezillon [this message]
2026-03-11 23:04 ` [PATCH v2 3/5] drm/tyr: Use register! macro for JOB_CONTROL Deborah Brouwer
2026-03-13 19:12   ` Daniel Almeida
2026-03-11 23:04 ` [PATCH v2 4/5] drm/tyr: Use register! macro for MMU_CONTROL Deborah Brouwer
2026-03-12  8:59   ` Boris Brezillon
2026-03-13 19:17   ` Daniel Almeida
2026-03-11 23:04 ` [PATCH v2 5/5] drm/tyr: Remove custom register struct Deborah Brouwer
2026-03-13 19:18   ` Daniel Almeida
2026-03-11 23:09 ` [PATCH v2 0/5] drm/tyr: Use register! macro Deborah Brouwer
2026-03-12  8:43 ` Boris Brezillon
2026-03-12  8:50   ` Boris Brezillon

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